diff options
author | Tony Lindgren <tony@atomide.com> | 2005-07-10 14:58:18 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2005-07-10 14:58:18 -0400 |
commit | bb13b5fdba16d5b30fe97f3d167bb138b978b71c (patch) | |
tree | 23e706d3412b29579909c499e1d9e62cc40a6f5e /arch/arm/plat-omap/mcbsp.c | |
parent | d48af15ea7227d633ddd5002223c2b122b1032e1 (diff) |
[PATCH] ARM: 2804/1: OMAP update 9/11: Update OMAP arch files
Patch from Tony Lindgren
This patch by various OMAP developers syncs the OMAP
specific arch files with the linux-omap tree.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-omap/mcbsp.c')
-rw-r--r-- | arch/arm/plat-omap/mcbsp.c | 97 |
1 files changed, 85 insertions, 12 deletions
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 10c3f22f9c6a..43567d5edddb 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
@@ -66,6 +66,7 @@ struct omap_mcbsp { | |||
66 | static struct omap_mcbsp mcbsp[OMAP_MAX_MCBSP_COUNT]; | 66 | static struct omap_mcbsp mcbsp[OMAP_MAX_MCBSP_COUNT]; |
67 | static struct clk *mcbsp_dsp_ck = 0; | 67 | static struct clk *mcbsp_dsp_ck = 0; |
68 | static struct clk *mcbsp_api_ck = 0; | 68 | static struct clk *mcbsp_api_ck = 0; |
69 | static struct clk *mcbsp_dspxor_ck = 0; | ||
69 | 70 | ||
70 | 71 | ||
71 | static void omap_mcbsp_dump_reg(u8 id) | 72 | static void omap_mcbsp_dump_reg(u8 id) |
@@ -175,7 +176,7 @@ static int omap_mcbsp_check(unsigned int id) | |||
175 | return 0; | 176 | return 0; |
176 | } | 177 | } |
177 | 178 | ||
178 | if (cpu_is_omap1510() || cpu_is_omap1610() || cpu_is_omap1710()) { | 179 | if (cpu_is_omap1510() || cpu_is_omap16xx()) { |
179 | if (id > OMAP_MAX_MCBSP_COUNT) { | 180 | if (id > OMAP_MAX_MCBSP_COUNT) { |
180 | printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1); | 181 | printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1); |
181 | return -1; | 182 | return -1; |
@@ -191,15 +192,12 @@ static int omap_mcbsp_check(unsigned int id) | |||
191 | 192 | ||
192 | static void omap_mcbsp_dsp_request(void) | 193 | static void omap_mcbsp_dsp_request(void) |
193 | { | 194 | { |
194 | if (cpu_is_omap1510() || cpu_is_omap1610() || cpu_is_omap1710()) { | 195 | if (cpu_is_omap1510() || cpu_is_omap16xx()) { |
195 | omap_writew((omap_readw(ARM_RSTCT1) | (1 << 1) | (1 << 2)), | 196 | clk_use(mcbsp_dsp_ck); |
196 | ARM_RSTCT1); | 197 | clk_use(mcbsp_api_ck); |
197 | clk_enable(mcbsp_dsp_ck); | ||
198 | clk_enable(mcbsp_api_ck); | ||
199 | 198 | ||
200 | /* enable 12MHz clock to mcbsp 1 & 3 */ | 199 | /* enable 12MHz clock to mcbsp 1 & 3 */ |
201 | __raw_writew(__raw_readw(DSP_IDLECT2) | (1 << EN_XORPCK), | 200 | clk_use(mcbsp_dspxor_ck); |
202 | DSP_IDLECT2); | ||
203 | __raw_writew(__raw_readw(DSP_RSTCT2) | 1 | 1 << 1, | 201 | __raw_writew(__raw_readw(DSP_RSTCT2) | 1 | 1 << 1, |
204 | DSP_RSTCT2); | 202 | DSP_RSTCT2); |
205 | } | 203 | } |
@@ -207,10 +205,13 @@ static void omap_mcbsp_dsp_request(void) | |||
207 | 205 | ||
208 | static void omap_mcbsp_dsp_free(void) | 206 | static void omap_mcbsp_dsp_free(void) |
209 | { | 207 | { |
210 | /* Useless for now */ | 208 | if (cpu_is_omap1510() || cpu_is_omap16xx()) { |
209 | clk_unuse(mcbsp_dspxor_ck); | ||
210 | clk_unuse(mcbsp_dsp_ck); | ||
211 | clk_unuse(mcbsp_api_ck); | ||
212 | } | ||
211 | } | 213 | } |
212 | 214 | ||
213 | |||
214 | int omap_mcbsp_request(unsigned int id) | 215 | int omap_mcbsp_request(unsigned int id) |
215 | { | 216 | { |
216 | int err; | 217 | int err; |
@@ -350,6 +351,73 @@ void omap_mcbsp_stop(unsigned int id) | |||
350 | } | 351 | } |
351 | 352 | ||
352 | 353 | ||
354 | /* polled mcbsp i/o operations */ | ||
355 | int omap_mcbsp_pollwrite(unsigned int id, u16 buf) | ||
356 | { | ||
357 | u32 base = mcbsp[id].io_base; | ||
358 | writew(buf, base + OMAP_MCBSP_REG_DXR1); | ||
359 | /* if frame sync error - clear the error */ | ||
360 | if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) { | ||
361 | /* clear error */ | ||
362 | writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR), | ||
363 | base + OMAP_MCBSP_REG_SPCR2); | ||
364 | /* resend */ | ||
365 | return -1; | ||
366 | } else { | ||
367 | /* wait for transmit confirmation */ | ||
368 | int attemps = 0; | ||
369 | while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) { | ||
370 | if (attemps++ > 1000) { | ||
371 | writew(readw(base + OMAP_MCBSP_REG_SPCR2) & | ||
372 | (~XRST), | ||
373 | base + OMAP_MCBSP_REG_SPCR2); | ||
374 | udelay(10); | ||
375 | writew(readw(base + OMAP_MCBSP_REG_SPCR2) | | ||
376 | (XRST), | ||
377 | base + OMAP_MCBSP_REG_SPCR2); | ||
378 | udelay(10); | ||
379 | printk(KERN_ERR | ||
380 | " Could not write to McBSP Register\n"); | ||
381 | return -2; | ||
382 | } | ||
383 | } | ||
384 | } | ||
385 | return 0; | ||
386 | } | ||
387 | |||
388 | int omap_mcbsp_pollread(unsigned int id, u16 * buf) | ||
389 | { | ||
390 | u32 base = mcbsp[id].io_base; | ||
391 | /* if frame sync error - clear the error */ | ||
392 | if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) { | ||
393 | /* clear error */ | ||
394 | writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR), | ||
395 | base + OMAP_MCBSP_REG_SPCR1); | ||
396 | /* resend */ | ||
397 | return -1; | ||
398 | } else { | ||
399 | /* wait for recieve confirmation */ | ||
400 | int attemps = 0; | ||
401 | while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) { | ||
402 | if (attemps++ > 1000) { | ||
403 | writew(readw(base + OMAP_MCBSP_REG_SPCR1) & | ||
404 | (~RRST), | ||
405 | base + OMAP_MCBSP_REG_SPCR1); | ||
406 | udelay(10); | ||
407 | writew(readw(base + OMAP_MCBSP_REG_SPCR1) | | ||
408 | (RRST), | ||
409 | base + OMAP_MCBSP_REG_SPCR1); | ||
410 | udelay(10); | ||
411 | printk(KERN_ERR | ||
412 | " Could not read from McBSP Register\n"); | ||
413 | return -2; | ||
414 | } | ||
415 | } | ||
416 | } | ||
417 | *buf = readw(base + OMAP_MCBSP_REG_DRR1); | ||
418 | return 0; | ||
419 | } | ||
420 | |||
353 | /* | 421 | /* |
354 | * IRQ based word transmission. | 422 | * IRQ based word transmission. |
355 | */ | 423 | */ |
@@ -625,10 +693,15 @@ static int __init omap_mcbsp_init(void) | |||
625 | return PTR_ERR(mcbsp_dsp_ck); | 693 | return PTR_ERR(mcbsp_dsp_ck); |
626 | } | 694 | } |
627 | mcbsp_api_ck = clk_get(0, "api_ck"); | 695 | mcbsp_api_ck = clk_get(0, "api_ck"); |
628 | if (IS_ERR(mcbsp_dsp_ck)) { | 696 | if (IS_ERR(mcbsp_api_ck)) { |
629 | printk(KERN_ERR "mcbsp: could not acquire api_ck handle.\n"); | 697 | printk(KERN_ERR "mcbsp: could not acquire api_ck handle.\n"); |
630 | return PTR_ERR(mcbsp_api_ck); | 698 | return PTR_ERR(mcbsp_api_ck); |
631 | } | 699 | } |
700 | mcbsp_dspxor_ck = clk_get(0, "dspxor_ck"); | ||
701 | if (IS_ERR(mcbsp_dspxor_ck)) { | ||
702 | printk(KERN_ERR "mcbsp: could not acquire dspxor_ck handle.\n"); | ||
703 | return PTR_ERR(mcbsp_dspxor_ck); | ||
704 | } | ||
632 | 705 | ||
633 | #ifdef CONFIG_ARCH_OMAP730 | 706 | #ifdef CONFIG_ARCH_OMAP730 |
634 | if (cpu_is_omap730()) { | 707 | if (cpu_is_omap730()) { |
@@ -643,7 +716,7 @@ static int __init omap_mcbsp_init(void) | |||
643 | } | 716 | } |
644 | #endif | 717 | #endif |
645 | #if defined(CONFIG_ARCH_OMAP16XX) | 718 | #if defined(CONFIG_ARCH_OMAP16XX) |
646 | if (cpu_is_omap1610() || cpu_is_omap1710()) { | 719 | if (cpu_is_omap16xx()) { |
647 | mcbsp_info = mcbsp_1610; | 720 | mcbsp_info = mcbsp_1610; |
648 | mcbsp_count = ARRAY_SIZE(mcbsp_1610); | 721 | mcbsp_count = ARRAY_SIZE(mcbsp_1610); |
649 | } | 722 | } |