diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-03-22 13:23:46 -0400 |
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committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-03-22 13:23:46 -0400 |
commit | 74511020dde10252f8b8e648690d99dba721de14 (patch) | |
tree | 04fc22bc7dd5d5b8d9294b2e57985b093858bd84 /arch/arm/plat-omap/mcbsp.c | |
parent | 69266866a5790080d7fe80094b28d670ff8aa765 (diff) | |
parent | 3cc4e53f86dab635166929bfa47cc68d59b28c26 (diff) |
Merge branch 'for-2.6.34' into for-2.6.35
Diffstat (limited to 'arch/arm/plat-omap/mcbsp.c')
-rw-r--r-- | arch/arm/plat-omap/mcbsp.c | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 5e6d3096c725..4ff7a11b1838 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
@@ -133,8 +133,7 @@ static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id) | |||
133 | dev_err(mcbsp_tx->dev, "TX Frame Sync Error! : 0x%x\n", | 133 | dev_err(mcbsp_tx->dev, "TX Frame Sync Error! : 0x%x\n", |
134 | irqst_spcr2); | 134 | irqst_spcr2); |
135 | /* Writing zero to XSYNC_ERR clears the IRQ */ | 135 | /* Writing zero to XSYNC_ERR clears the IRQ */ |
136 | MCBSP_WRITE(mcbsp_tx, SPCR2, | 136 | MCBSP_WRITE(mcbsp_tx, SPCR2, MCBSP_READ_CACHE(mcbsp_tx, SPCR2)); |
137 | MCBSP_READ_CACHE(mcbsp_tx, SPCR2) & ~(XSYNC_ERR)); | ||
138 | } else { | 137 | } else { |
139 | complete(&mcbsp_tx->tx_irq_completion); | 138 | complete(&mcbsp_tx->tx_irq_completion); |
140 | } | 139 | } |
@@ -154,8 +153,7 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id) | |||
154 | dev_err(mcbsp_rx->dev, "RX Frame Sync Error! : 0x%x\n", | 153 | dev_err(mcbsp_rx->dev, "RX Frame Sync Error! : 0x%x\n", |
155 | irqst_spcr1); | 154 | irqst_spcr1); |
156 | /* Writing zero to RSYNC_ERR clears the IRQ */ | 155 | /* Writing zero to RSYNC_ERR clears the IRQ */ |
157 | MCBSP_WRITE(mcbsp_rx, SPCR1, | 156 | MCBSP_WRITE(mcbsp_rx, SPCR1, MCBSP_READ_CACHE(mcbsp_rx, SPCR1)); |
158 | MCBSP_READ_CACHE(mcbsp_rx, SPCR1) & ~(RSYNC_ERR)); | ||
159 | } else { | 157 | } else { |
160 | complete(&mcbsp_rx->tx_irq_completion); | 158 | complete(&mcbsp_rx->tx_irq_completion); |
161 | } | 159 | } |
@@ -989,8 +987,7 @@ int omap_mcbsp_pollwrite(unsigned int id, u16 buf) | |||
989 | /* if frame sync error - clear the error */ | 987 | /* if frame sync error - clear the error */ |
990 | if (MCBSP_READ(mcbsp, SPCR2) & XSYNC_ERR) { | 988 | if (MCBSP_READ(mcbsp, SPCR2) & XSYNC_ERR) { |
991 | /* clear error */ | 989 | /* clear error */ |
992 | MCBSP_WRITE(mcbsp, SPCR2, | 990 | MCBSP_WRITE(mcbsp, SPCR2, MCBSP_READ_CACHE(mcbsp, SPCR2)); |
993 | MCBSP_READ_CACHE(mcbsp, SPCR2) & (~XSYNC_ERR)); | ||
994 | /* resend */ | 991 | /* resend */ |
995 | return -1; | 992 | return -1; |
996 | } else { | 993 | } else { |
@@ -1030,8 +1027,7 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf) | |||
1030 | /* if frame sync error - clear the error */ | 1027 | /* if frame sync error - clear the error */ |
1031 | if (MCBSP_READ(mcbsp, SPCR1) & RSYNC_ERR) { | 1028 | if (MCBSP_READ(mcbsp, SPCR1) & RSYNC_ERR) { |
1032 | /* clear error */ | 1029 | /* clear error */ |
1033 | MCBSP_WRITE(mcbsp, SPCR1, | 1030 | MCBSP_WRITE(mcbsp, SPCR1, MCBSP_READ_CACHE(mcbsp, SPCR1)); |
1034 | MCBSP_READ_CACHE(mcbsp, SPCR1) & (~RSYNC_ERR)); | ||
1035 | /* resend */ | 1031 | /* resend */ |
1036 | return -1; | 1032 | return -1; |
1037 | } else { | 1033 | } else { |