diff options
author | Jarkko Nikula <jarkko.nikula@bitmer.com> | 2011-09-26 03:45:39 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2011-09-26 20:46:48 -0400 |
commit | cdc71514a0f4f3e8c995f18d1119cef01a501dac (patch) | |
tree | ffc6ae60449339619d92dda064051052da7ededb /arch/arm/plat-omap/mcbsp.c | |
parent | 40246e0003f02160a116db249270129b0c600e95 (diff) |
ARM: OMAP: mcbsp: Implement generic register access
Register access can be made more generic by calculating register address
offsets runtime from common register definitions and by using reg_size and
reg_step variables that are passed via platform data. Common register
definitions are possible since McBSP registers are ordered similarly between
OMAP versions.
Remove also references to OMAP2+ specific config_type variable from generic
McBSP code since other variables and feature flags are better to carry needed
information from platform code.
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/mcbsp.c')
-rw-r--r-- | arch/arm/plat-omap/mcbsp.c | 45 |
1 files changed, 20 insertions, 25 deletions
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 4b233e8cf905..623f2c1e9d4a 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
@@ -35,29 +35,27 @@ int omap_mcbsp_count, omap_mcbsp_cache_size; | |||
35 | 35 | ||
36 | static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) | 36 | static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) |
37 | { | 37 | { |
38 | if (cpu_class_is_omap1()) { | 38 | void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; |
39 | ((u16 *)mcbsp->reg_cache)[reg / sizeof(u16)] = (u16)val; | 39 | |
40 | __raw_writew((u16)val, mcbsp->io_base + reg); | 40 | if (mcbsp->pdata->reg_size == 2) { |
41 | } else if (cpu_is_omap2420()) { | 41 | ((u16 *)mcbsp->reg_cache)[reg] = (u16)val; |
42 | ((u16 *)mcbsp->reg_cache)[reg / sizeof(u32)] = (u16)val; | 42 | __raw_writew((u16)val, addr); |
43 | __raw_writew((u16)val, mcbsp->io_base + reg); | ||
44 | } else { | 43 | } else { |
45 | ((u32 *)mcbsp->reg_cache)[reg / sizeof(u32)] = val; | 44 | ((u32 *)mcbsp->reg_cache)[reg] = val; |
46 | __raw_writel(val, mcbsp->io_base + reg); | 45 | __raw_writel(val, addr); |
47 | } | 46 | } |
48 | } | 47 | } |
49 | 48 | ||
50 | static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache) | 49 | static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache) |
51 | { | 50 | { |
52 | if (cpu_class_is_omap1()) { | 51 | void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; |
53 | return !from_cache ? __raw_readw(mcbsp->io_base + reg) : | 52 | |
54 | ((u16 *)mcbsp->reg_cache)[reg / sizeof(u16)]; | 53 | if (mcbsp->pdata->reg_size == 2) { |
55 | } else if (cpu_is_omap2420()) { | 54 | return !from_cache ? __raw_readw(addr) : |
56 | return !from_cache ? __raw_readw(mcbsp->io_base + reg) : | 55 | ((u16 *)mcbsp->reg_cache)[reg]; |
57 | ((u16 *)mcbsp->reg_cache)[reg / sizeof(u32)]; | ||
58 | } else { | 56 | } else { |
59 | return !from_cache ? __raw_readl(mcbsp->io_base + reg) : | 57 | return !from_cache ? __raw_readl(addr) : |
60 | ((u32 *)mcbsp->reg_cache)[reg / sizeof(u32)]; | 58 | ((u32 *)mcbsp->reg_cache)[reg]; |
61 | } | 59 | } |
62 | } | 60 | } |
63 | 61 | ||
@@ -238,21 +236,19 @@ int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream) | |||
238 | } | 236 | } |
239 | mcbsp = id_to_mcbsp_ptr(id); | 237 | mcbsp = id_to_mcbsp_ptr(id); |
240 | 238 | ||
241 | data_reg = mcbsp->phys_dma_base; | 239 | if (mcbsp->pdata->reg_size == 2) { |
242 | |||
243 | if (mcbsp->mcbsp_config_type < MCBSP_CONFIG_TYPE2) { | ||
244 | if (stream) | 240 | if (stream) |
245 | data_reg += OMAP_MCBSP_REG_DRR1; | 241 | data_reg = OMAP_MCBSP_REG_DRR1; |
246 | else | 242 | else |
247 | data_reg += OMAP_MCBSP_REG_DXR1; | 243 | data_reg = OMAP_MCBSP_REG_DXR1; |
248 | } else { | 244 | } else { |
249 | if (stream) | 245 | if (stream) |
250 | data_reg += OMAP_MCBSP_REG_DRR; | 246 | data_reg = OMAP_MCBSP_REG_DRR; |
251 | else | 247 | else |
252 | data_reg += OMAP_MCBSP_REG_DXR; | 248 | data_reg = OMAP_MCBSP_REG_DXR; |
253 | } | 249 | } |
254 | 250 | ||
255 | return data_reg; | 251 | return mcbsp->phys_dma_base + data_reg * mcbsp->pdata->reg_step; |
256 | } | 252 | } |
257 | EXPORT_SYMBOL(omap_mcbsp_dma_reg_params); | 253 | EXPORT_SYMBOL(omap_mcbsp_dma_reg_params); |
258 | 254 | ||
@@ -1337,7 +1333,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) | |||
1337 | mcbsp->pdata = pdata; | 1333 | mcbsp->pdata = pdata; |
1338 | mcbsp->dev = &pdev->dev; | 1334 | mcbsp->dev = &pdev->dev; |
1339 | mcbsp_ptr[id] = mcbsp; | 1335 | mcbsp_ptr[id] = mcbsp; |
1340 | mcbsp->mcbsp_config_type = pdata->mcbsp_config_type; | ||
1341 | platform_set_drvdata(pdev, mcbsp); | 1336 | platform_set_drvdata(pdev, mcbsp); |
1342 | pm_runtime_enable(mcbsp->dev); | 1337 | pm_runtime_enable(mcbsp->dev); |
1343 | 1338 | ||