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authorTony Lindgren <tony@atomide.com>2010-05-20 14:35:19 -0400
committerTony Lindgren <tony@atomide.com>2010-05-20 14:35:19 -0400
commit4fa73a1bf89ebea4eba8a9982b5f64d266d8b5e9 (patch)
tree9d4558065a2586c25a0c0c3d87ed8402981d616d /arch/arm/plat-omap/include
parentc8f626fe1c7e6de983b0c3b6375da69ded3313b6 (diff)
parent59dd7224892142fe1d8505cf2c90bd732d730005 (diff)
Merge branch 'for_2.6.35' of git://git.pwsan.com/linux-2.6 into omap-for-linus
Diffstat (limited to 'arch/arm/plat-omap/include')
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h14
-rw-r--r--arch/arm/plat-omap/include/plat/omap44xx.h1
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h16
-rw-r--r--arch/arm/plat-omap/include/plat/powerdomain.h7
4 files changed, 23 insertions, 15 deletions
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index 34f7fa9ad4c0..dfc472ca0cc4 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -196,15 +196,15 @@ extern struct clk dummy_ck;
196#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */ 196#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
197 197
198/* Clksel_rate flags */ 198/* Clksel_rate flags */
199#define DEFAULT_RATE (1 << 0) 199#define RATE_IN_242X (1 << 0)
200#define RATE_IN_242X (1 << 1) 200#define RATE_IN_243X (1 << 1)
201#define RATE_IN_243X (1 << 2) 201#define RATE_IN_3XXX (1 << 2) /* rates common to all OMAP3 */
202#define RATE_IN_343X (1 << 3) /* rates common to all 343X */ 202#define RATE_IN_3430ES2 (1 << 3) /* 3430ES2 rates only */
203#define RATE_IN_3430ES2 (1 << 4) /* 3430ES2 rates only */ 203#define RATE_IN_36XX (1 << 4)
204#define RATE_IN_36XX (1 << 5) 204#define RATE_IN_4430 (1 << 5)
205#define RATE_IN_4430 (1 << 6)
206 205
207#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) 206#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
208 207
208#define RATE_IN_3430ES2PLUS (RATE_IN_3430ES2 | RATE_IN_36XX)
209 209
210#endif 210#endif
diff --git a/arch/arm/plat-omap/include/plat/omap44xx.h b/arch/arm/plat-omap/include/plat/omap44xx.h
index bb94a0baee8a..8b3f12ff5cbc 100644
--- a/arch/arm/plat-omap/include/plat/omap44xx.h
+++ b/arch/arm/plat-omap/include/plat/omap44xx.h
@@ -30,6 +30,7 @@
30#define OMAP4430_CM_BASE OMAP4430_CM1_BASE 30#define OMAP4430_CM_BASE OMAP4430_CM1_BASE
31#define OMAP4430_CM2_BASE 0x4a008000 31#define OMAP4430_CM2_BASE 0x4a008000
32#define OMAP4430_PRM_BASE 0x4a306000 32#define OMAP4430_PRM_BASE 0x4a306000
33#define OMAP4430_PRCM_MPU_BASE 0x48243000
33#define OMAP44XX_GPMC_BASE 0x50000000 34#define OMAP44XX_GPMC_BASE 0x50000000
34#define OMAP443X_SCM_BASE 0x4a002000 35#define OMAP443X_SCM_BASE 0x4a002000
35#define OMAP443X_CTRL_BASE 0x4a100000 36#define OMAP443X_CTRL_BASE 0x4a100000
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 36d6ea56ab51..0eccc09ac4a9 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -176,9 +176,8 @@ struct omap_hwmod_addr_space {
176#define OCP_USER_SDMA (1 << 1) 176#define OCP_USER_SDMA (1 << 1)
177 177
178/* omap_hwmod_ocp_if.flags bits */ 178/* omap_hwmod_ocp_if.flags bits */
179#define OCPIF_HAS_IDLEST (1 << 0) 179#define OCPIF_SWSUP_IDLE (1 << 0)
180#define OCPIF_SWSUP_IDLE (1 << 1) 180#define OCPIF_CAN_BURST (1 << 1)
181#define OCPIF_CAN_BURST (1 << 2)
182 181
183/** 182/**
184 * struct omap_hwmod_ocp_if - OCP interface data 183 * struct omap_hwmod_ocp_if - OCP interface data
@@ -327,14 +326,12 @@ struct omap_hwmod_omap2_prcm {
327 326
328/** 327/**
329 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data 328 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
330 * @module_offs: PRCM submodule offset from the start of the PRM/CM1/CM2 329 * @clkctrl_reg: PRCM address of the clock control register
331 * @device_offs: device register offset from @module_offs
332 * @submodule_wkdep_bit: bit shift of the WKDEP range 330 * @submodule_wkdep_bit: bit shift of the WKDEP range
333 */ 331 */
334struct omap_hwmod_omap4_prcm { 332struct omap_hwmod_omap4_prcm {
335 u32 module_offs; 333 void __iomem *clkctrl_reg;
336 u16 device_offs; 334 u8 submodule_wkdep_bit;
337 u8 submodule_wkdep_bit;
338}; 335};
339 336
340 337
@@ -353,6 +350,8 @@ struct omap_hwmod_omap4_prcm {
353 * when module is enabled, rather than the default, which is to 350 * when module is enabled, rather than the default, which is to
354 * enable autoidle 351 * enable autoidle
355 * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup 352 * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
353 * HWMOD_NO_IDLEST : this module does not have idle status - this is the case
354 * only for few initiator modules on OMAP2 & 3.
356 */ 355 */
357#define HWMOD_SWSUP_SIDLE (1 << 0) 356#define HWMOD_SWSUP_SIDLE (1 << 0)
358#define HWMOD_SWSUP_MSTANDBY (1 << 1) 357#define HWMOD_SWSUP_MSTANDBY (1 << 1)
@@ -360,6 +359,7 @@ struct omap_hwmod_omap4_prcm {
360#define HWMOD_INIT_NO_IDLE (1 << 3) 359#define HWMOD_INIT_NO_IDLE (1 << 3)
361#define HWMOD_NO_OCP_AUTOIDLE (1 << 4) 360#define HWMOD_NO_OCP_AUTOIDLE (1 << 4)
362#define HWMOD_SET_DEFAULT_CLOCKACT (1 << 5) 361#define HWMOD_SET_DEFAULT_CLOCKACT (1 << 5)
362#define HWMOD_NO_IDLEST (1 << 6)
363 363
364/* 364/*
365 * omap_hwmod._int_flags definitions 365 * omap_hwmod._int_flags definitions
diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/plat-omap/include/plat/powerdomain.h
index d82b2c00d4f1..fb6ec74fe39e 100644
--- a/arch/arm/plat-omap/include/plat/powerdomain.h
+++ b/arch/arm/plat-omap/include/plat/powerdomain.h
@@ -31,6 +31,7 @@
31#define PWRDM_MAX_PWRSTS 4 31#define PWRDM_MAX_PWRSTS 4
32 32
33/* Powerdomain allowable state bitfields */ 33/* Powerdomain allowable state bitfields */
34#define PWRSTS_ON (1 << PWRDM_POWER_ON)
34#define PWRSTS_OFF_ON ((1 << PWRDM_POWER_OFF) | \ 35#define PWRSTS_OFF_ON ((1 << PWRDM_POWER_OFF) | \
35 (1 << PWRDM_POWER_ON)) 36 (1 << PWRDM_POWER_ON))
36 37
@@ -49,6 +50,12 @@
49 * in MEM bank 1 position. This is 50 * in MEM bank 1 position. This is
50 * true for OMAP3430 51 * true for OMAP3430
51 */ 52 */
53#define PWRDM_HAS_LOWPOWERSTATECHANGE (1 << 2) /*
54 * support to transition from a
55 * sleep state to a lower sleep
56 * state without waking up the
57 * powerdomain
58 */
52 59
53/* 60/*
54 * Number of memory banks that are power-controllable. On OMAP4430, the 61 * Number of memory banks that are power-controllable. On OMAP4430, the