diff options
author | Olof Johansson <olof@lixom.net> | 2012-12-01 00:38:59 -0500 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2012-12-01 00:38:59 -0500 |
commit | 794b175fc0c0c4844dbb7b137a73bbfd01f6c608 (patch) | |
tree | 69b9394b5b09118f9877cd02838a7cd2d7c4f63c /arch/arm/plat-omap/include | |
parent | 4fabb6332a2b747c7f6783f146a8fb3d2f88d91c (diff) | |
parent | 2ab7c84815cffd5fe4946a472fc67fefa8ac3c29 (diff) |
Merge tag 'omap-for-v3.8/cleanup-headers-iommu-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
From Tony Lindgren:
Move most of remaining omap iommu code to drivers/iommu.
This is needed for the multiplatform kernels as the plat
and mach headers cannot be included.
These changes were agreed to be merged via the arm-soc
tree by Joerg and Ohad as these will cause some merge
conflicts with the other related clean-up branches.
So omap-for-v3.8/cleanup-headers-iommu should be added
as one of the depends branches for arm-soc.
* tag 'omap-for-v3.8/cleanup-headers-iommu-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Move iommu/iovmm headers to platform_data
ARM: OMAP2+: Make some definitions local
ARM: OMAP2+: Move iommu2 to drivers/iommu/omap-iommu2.c
ARM: OMAP2+: Move plat/iovmm.h to include/linux/omap-iommu.h
ARM: OMAP2+: Move iopgtable header to drivers/iommu/
ARM: OMAP: Merge iommu2.h into iommu.h
Conflicts due to surrounding changes fixed up in:
arch/arm/mach-omap2/omap_hwmod_44xx_data.c
drivers/media/platform/omap3isp/ispvideo.c
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/plat-omap/include')
-rw-r--r-- | arch/arm/plat-omap/include/plat/iommu.h | 221 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/iommu2.h | 96 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/iopgtable.h | 120 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/iovmm.h | 89 |
4 files changed, 0 insertions, 526 deletions
diff --git a/arch/arm/plat-omap/include/plat/iommu.h b/arch/arm/plat-omap/include/plat/iommu.h deleted file mode 100644 index 68b5f0362f35..000000000000 --- a/arch/arm/plat-omap/include/plat/iommu.h +++ /dev/null | |||
@@ -1,221 +0,0 @@ | |||
1 | /* | ||
2 | * omap iommu: main structures | ||
3 | * | ||
4 | * Copyright (C) 2008-2009 Nokia Corporation | ||
5 | * | ||
6 | * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __MACH_IOMMU_H | ||
14 | #define __MACH_IOMMU_H | ||
15 | |||
16 | struct iotlb_entry { | ||
17 | u32 da; | ||
18 | u32 pa; | ||
19 | u32 pgsz, prsvd, valid; | ||
20 | union { | ||
21 | u16 ap; | ||
22 | struct { | ||
23 | u32 endian, elsz, mixed; | ||
24 | }; | ||
25 | }; | ||
26 | }; | ||
27 | |||
28 | struct omap_iommu { | ||
29 | const char *name; | ||
30 | struct module *owner; | ||
31 | struct clk *clk; | ||
32 | void __iomem *regbase; | ||
33 | struct device *dev; | ||
34 | void *isr_priv; | ||
35 | struct iommu_domain *domain; | ||
36 | |||
37 | unsigned int refcount; | ||
38 | spinlock_t iommu_lock; /* global for this whole object */ | ||
39 | |||
40 | /* | ||
41 | * We don't change iopgd for a situation like pgd for a task, | ||
42 | * but share it globally for each iommu. | ||
43 | */ | ||
44 | u32 *iopgd; | ||
45 | spinlock_t page_table_lock; /* protect iopgd */ | ||
46 | |||
47 | int nr_tlb_entries; | ||
48 | |||
49 | struct list_head mmap; | ||
50 | struct mutex mmap_lock; /* protect mmap */ | ||
51 | |||
52 | void *ctx; /* iommu context: registres saved area */ | ||
53 | u32 da_start; | ||
54 | u32 da_end; | ||
55 | }; | ||
56 | |||
57 | struct cr_regs { | ||
58 | union { | ||
59 | struct { | ||
60 | u16 cam_l; | ||
61 | u16 cam_h; | ||
62 | }; | ||
63 | u32 cam; | ||
64 | }; | ||
65 | union { | ||
66 | struct { | ||
67 | u16 ram_l; | ||
68 | u16 ram_h; | ||
69 | }; | ||
70 | u32 ram; | ||
71 | }; | ||
72 | }; | ||
73 | |||
74 | struct iotlb_lock { | ||
75 | short base; | ||
76 | short vict; | ||
77 | }; | ||
78 | |||
79 | /* architecture specific functions */ | ||
80 | struct iommu_functions { | ||
81 | unsigned long version; | ||
82 | |||
83 | int (*enable)(struct omap_iommu *obj); | ||
84 | void (*disable)(struct omap_iommu *obj); | ||
85 | void (*set_twl)(struct omap_iommu *obj, bool on); | ||
86 | u32 (*fault_isr)(struct omap_iommu *obj, u32 *ra); | ||
87 | |||
88 | void (*tlb_read_cr)(struct omap_iommu *obj, struct cr_regs *cr); | ||
89 | void (*tlb_load_cr)(struct omap_iommu *obj, struct cr_regs *cr); | ||
90 | |||
91 | struct cr_regs *(*alloc_cr)(struct omap_iommu *obj, | ||
92 | struct iotlb_entry *e); | ||
93 | int (*cr_valid)(struct cr_regs *cr); | ||
94 | u32 (*cr_to_virt)(struct cr_regs *cr); | ||
95 | void (*cr_to_e)(struct cr_regs *cr, struct iotlb_entry *e); | ||
96 | ssize_t (*dump_cr)(struct omap_iommu *obj, struct cr_regs *cr, | ||
97 | char *buf); | ||
98 | |||
99 | u32 (*get_pte_attr)(struct iotlb_entry *e); | ||
100 | |||
101 | void (*save_ctx)(struct omap_iommu *obj); | ||
102 | void (*restore_ctx)(struct omap_iommu *obj); | ||
103 | ssize_t (*dump_ctx)(struct omap_iommu *obj, char *buf, ssize_t len); | ||
104 | }; | ||
105 | |||
106 | /** | ||
107 | * struct omap_mmu_dev_attr - OMAP mmu device attributes for omap_hwmod | ||
108 | * @da_start: device address where the va space starts. | ||
109 | * @da_end: device address where the va space ends. | ||
110 | * @nr_tlb_entries: number of entries supported by the translation | ||
111 | * look-aside buffer (TLB). | ||
112 | */ | ||
113 | struct omap_mmu_dev_attr { | ||
114 | u32 da_start; | ||
115 | u32 da_end; | ||
116 | int nr_tlb_entries; | ||
117 | }; | ||
118 | |||
119 | struct iommu_platform_data { | ||
120 | const char *name; | ||
121 | const char *clk_name; | ||
122 | const int nr_tlb_entries; | ||
123 | u32 da_start; | ||
124 | u32 da_end; | ||
125 | }; | ||
126 | |||
127 | /** | ||
128 | * struct iommu_arch_data - omap iommu private data | ||
129 | * @name: name of the iommu device | ||
130 | * @iommu_dev: handle of the iommu device | ||
131 | * | ||
132 | * This is an omap iommu private data object, which binds an iommu user | ||
133 | * to its iommu device. This object should be placed at the iommu user's | ||
134 | * dev_archdata so generic IOMMU API can be used without having to | ||
135 | * utilize omap-specific plumbing anymore. | ||
136 | */ | ||
137 | struct omap_iommu_arch_data { | ||
138 | const char *name; | ||
139 | struct omap_iommu *iommu_dev; | ||
140 | }; | ||
141 | |||
142 | #ifdef CONFIG_IOMMU_API | ||
143 | /** | ||
144 | * dev_to_omap_iommu() - retrieves an omap iommu object from a user device | ||
145 | * @dev: iommu client device | ||
146 | */ | ||
147 | static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev) | ||
148 | { | ||
149 | struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; | ||
150 | |||
151 | return arch_data->iommu_dev; | ||
152 | } | ||
153 | #endif | ||
154 | |||
155 | /* IOMMU errors */ | ||
156 | #define OMAP_IOMMU_ERR_TLB_MISS (1 << 0) | ||
157 | #define OMAP_IOMMU_ERR_TRANS_FAULT (1 << 1) | ||
158 | #define OMAP_IOMMU_ERR_EMU_MISS (1 << 2) | ||
159 | #define OMAP_IOMMU_ERR_TBLWALK_FAULT (1 << 3) | ||
160 | #define OMAP_IOMMU_ERR_MULTIHIT_FAULT (1 << 4) | ||
161 | |||
162 | #if defined(CONFIG_ARCH_OMAP1) | ||
163 | #error "iommu for this processor not implemented yet" | ||
164 | #else | ||
165 | #include <plat/iommu2.h> | ||
166 | #endif | ||
167 | |||
168 | /* | ||
169 | * utilities for super page(16MB, 1MB, 64KB and 4KB) | ||
170 | */ | ||
171 | |||
172 | #define iopgsz_max(bytes) \ | ||
173 | (((bytes) >= SZ_16M) ? SZ_16M : \ | ||
174 | ((bytes) >= SZ_1M) ? SZ_1M : \ | ||
175 | ((bytes) >= SZ_64K) ? SZ_64K : \ | ||
176 | ((bytes) >= SZ_4K) ? SZ_4K : 0) | ||
177 | |||
178 | #define bytes_to_iopgsz(bytes) \ | ||
179 | (((bytes) == SZ_16M) ? MMU_CAM_PGSZ_16M : \ | ||
180 | ((bytes) == SZ_1M) ? MMU_CAM_PGSZ_1M : \ | ||
181 | ((bytes) == SZ_64K) ? MMU_CAM_PGSZ_64K : \ | ||
182 | ((bytes) == SZ_4K) ? MMU_CAM_PGSZ_4K : -1) | ||
183 | |||
184 | #define iopgsz_to_bytes(iopgsz) \ | ||
185 | (((iopgsz) == MMU_CAM_PGSZ_16M) ? SZ_16M : \ | ||
186 | ((iopgsz) == MMU_CAM_PGSZ_1M) ? SZ_1M : \ | ||
187 | ((iopgsz) == MMU_CAM_PGSZ_64K) ? SZ_64K : \ | ||
188 | ((iopgsz) == MMU_CAM_PGSZ_4K) ? SZ_4K : 0) | ||
189 | |||
190 | #define iopgsz_ok(bytes) (bytes_to_iopgsz(bytes) >= 0) | ||
191 | |||
192 | /* | ||
193 | * global functions | ||
194 | */ | ||
195 | extern u32 omap_iommu_arch_version(void); | ||
196 | |||
197 | extern void omap_iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e); | ||
198 | |||
199 | extern int | ||
200 | omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e); | ||
201 | |||
202 | extern int omap_iommu_set_isr(const char *name, | ||
203 | int (*isr)(struct omap_iommu *obj, u32 da, u32 iommu_errs, | ||
204 | void *priv), | ||
205 | void *isr_priv); | ||
206 | |||
207 | extern void omap_iommu_save_ctx(struct device *dev); | ||
208 | extern void omap_iommu_restore_ctx(struct device *dev); | ||
209 | |||
210 | extern int omap_install_iommu_arch(const struct iommu_functions *ops); | ||
211 | extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops); | ||
212 | |||
213 | extern int omap_foreach_iommu_device(void *data, | ||
214 | int (*fn)(struct device *, void *)); | ||
215 | |||
216 | extern ssize_t | ||
217 | omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len); | ||
218 | extern size_t | ||
219 | omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len); | ||
220 | |||
221 | #endif /* __MACH_IOMMU_H */ | ||
diff --git a/arch/arm/plat-omap/include/plat/iommu2.h b/arch/arm/plat-omap/include/plat/iommu2.h deleted file mode 100644 index d4116b595e40..000000000000 --- a/arch/arm/plat-omap/include/plat/iommu2.h +++ /dev/null | |||
@@ -1,96 +0,0 @@ | |||
1 | /* | ||
2 | * omap iommu: omap2 architecture specific definitions | ||
3 | * | ||
4 | * Copyright (C) 2008-2009 Nokia Corporation | ||
5 | * | ||
6 | * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __MACH_IOMMU2_H | ||
14 | #define __MACH_IOMMU2_H | ||
15 | |||
16 | #include <linux/io.h> | ||
17 | |||
18 | /* | ||
19 | * MMU Register offsets | ||
20 | */ | ||
21 | #define MMU_REVISION 0x00 | ||
22 | #define MMU_SYSCONFIG 0x10 | ||
23 | #define MMU_SYSSTATUS 0x14 | ||
24 | #define MMU_IRQSTATUS 0x18 | ||
25 | #define MMU_IRQENABLE 0x1c | ||
26 | #define MMU_WALKING_ST 0x40 | ||
27 | #define MMU_CNTL 0x44 | ||
28 | #define MMU_FAULT_AD 0x48 | ||
29 | #define MMU_TTB 0x4c | ||
30 | #define MMU_LOCK 0x50 | ||
31 | #define MMU_LD_TLB 0x54 | ||
32 | #define MMU_CAM 0x58 | ||
33 | #define MMU_RAM 0x5c | ||
34 | #define MMU_GFLUSH 0x60 | ||
35 | #define MMU_FLUSH_ENTRY 0x64 | ||
36 | #define MMU_READ_CAM 0x68 | ||
37 | #define MMU_READ_RAM 0x6c | ||
38 | #define MMU_EMU_FAULT_AD 0x70 | ||
39 | |||
40 | #define MMU_REG_SIZE 256 | ||
41 | |||
42 | /* | ||
43 | * MMU Register bit definitions | ||
44 | */ | ||
45 | #define MMU_LOCK_BASE_SHIFT 10 | ||
46 | #define MMU_LOCK_BASE_MASK (0x1f << MMU_LOCK_BASE_SHIFT) | ||
47 | #define MMU_LOCK_BASE(x) \ | ||
48 | ((x & MMU_LOCK_BASE_MASK) >> MMU_LOCK_BASE_SHIFT) | ||
49 | |||
50 | #define MMU_LOCK_VICT_SHIFT 4 | ||
51 | #define MMU_LOCK_VICT_MASK (0x1f << MMU_LOCK_VICT_SHIFT) | ||
52 | #define MMU_LOCK_VICT(x) \ | ||
53 | ((x & MMU_LOCK_VICT_MASK) >> MMU_LOCK_VICT_SHIFT) | ||
54 | |||
55 | #define MMU_CAM_VATAG_SHIFT 12 | ||
56 | #define MMU_CAM_VATAG_MASK \ | ||
57 | ((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT) | ||
58 | #define MMU_CAM_P (1 << 3) | ||
59 | #define MMU_CAM_V (1 << 2) | ||
60 | #define MMU_CAM_PGSZ_MASK 3 | ||
61 | #define MMU_CAM_PGSZ_1M (0 << 0) | ||
62 | #define MMU_CAM_PGSZ_64K (1 << 0) | ||
63 | #define MMU_CAM_PGSZ_4K (2 << 0) | ||
64 | #define MMU_CAM_PGSZ_16M (3 << 0) | ||
65 | |||
66 | #define MMU_RAM_PADDR_SHIFT 12 | ||
67 | #define MMU_RAM_PADDR_MASK \ | ||
68 | ((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT) | ||
69 | #define MMU_RAM_ENDIAN_SHIFT 9 | ||
70 | #define MMU_RAM_ENDIAN_MASK (1 << MMU_RAM_ENDIAN_SHIFT) | ||
71 | #define MMU_RAM_ENDIAN_BIG (1 << MMU_RAM_ENDIAN_SHIFT) | ||
72 | #define MMU_RAM_ENDIAN_LITTLE (0 << MMU_RAM_ENDIAN_SHIFT) | ||
73 | #define MMU_RAM_ELSZ_SHIFT 7 | ||
74 | #define MMU_RAM_ELSZ_MASK (3 << MMU_RAM_ELSZ_SHIFT) | ||
75 | #define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT) | ||
76 | #define MMU_RAM_ELSZ_16 (1 << MMU_RAM_ELSZ_SHIFT) | ||
77 | #define MMU_RAM_ELSZ_32 (2 << MMU_RAM_ELSZ_SHIFT) | ||
78 | #define MMU_RAM_ELSZ_NONE (3 << MMU_RAM_ELSZ_SHIFT) | ||
79 | #define MMU_RAM_MIXED_SHIFT 6 | ||
80 | #define MMU_RAM_MIXED_MASK (1 << MMU_RAM_MIXED_SHIFT) | ||
81 | #define MMU_RAM_MIXED MMU_RAM_MIXED_MASK | ||
82 | |||
83 | /* | ||
84 | * register accessors | ||
85 | */ | ||
86 | static inline u32 iommu_read_reg(struct omap_iommu *obj, size_t offs) | ||
87 | { | ||
88 | return __raw_readl(obj->regbase + offs); | ||
89 | } | ||
90 | |||
91 | static inline void iommu_write_reg(struct omap_iommu *obj, u32 val, size_t offs) | ||
92 | { | ||
93 | __raw_writel(val, obj->regbase + offs); | ||
94 | } | ||
95 | |||
96 | #endif /* __MACH_IOMMU2_H */ | ||
diff --git a/arch/arm/plat-omap/include/plat/iopgtable.h b/arch/arm/plat-omap/include/plat/iopgtable.h deleted file mode 100644 index 66a813977d52..000000000000 --- a/arch/arm/plat-omap/include/plat/iopgtable.h +++ /dev/null | |||
@@ -1,120 +0,0 @@ | |||
1 | /* | ||
2 | * omap iommu: pagetable definitions | ||
3 | * | ||
4 | * Copyright (C) 2008-2010 Nokia Corporation | ||
5 | * | ||
6 | * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __PLAT_OMAP_IOMMU_H | ||
14 | #define __PLAT_OMAP_IOMMU_H | ||
15 | |||
16 | /* | ||
17 | * "L2 table" address mask and size definitions. | ||
18 | */ | ||
19 | #define IOPGD_SHIFT 20 | ||
20 | #define IOPGD_SIZE (1UL << IOPGD_SHIFT) | ||
21 | #define IOPGD_MASK (~(IOPGD_SIZE - 1)) | ||
22 | |||
23 | /* | ||
24 | * "section" address mask and size definitions. | ||
25 | */ | ||
26 | #define IOSECTION_SHIFT 20 | ||
27 | #define IOSECTION_SIZE (1UL << IOSECTION_SHIFT) | ||
28 | #define IOSECTION_MASK (~(IOSECTION_SIZE - 1)) | ||
29 | |||
30 | /* | ||
31 | * "supersection" address mask and size definitions. | ||
32 | */ | ||
33 | #define IOSUPER_SHIFT 24 | ||
34 | #define IOSUPER_SIZE (1UL << IOSUPER_SHIFT) | ||
35 | #define IOSUPER_MASK (~(IOSUPER_SIZE - 1)) | ||
36 | |||
37 | #define PTRS_PER_IOPGD (1UL << (32 - IOPGD_SHIFT)) | ||
38 | #define IOPGD_TABLE_SIZE (PTRS_PER_IOPGD * sizeof(u32)) | ||
39 | |||
40 | /* | ||
41 | * "small page" address mask and size definitions. | ||
42 | */ | ||
43 | #define IOPTE_SHIFT 12 | ||
44 | #define IOPTE_SIZE (1UL << IOPTE_SHIFT) | ||
45 | #define IOPTE_MASK (~(IOPTE_SIZE - 1)) | ||
46 | |||
47 | /* | ||
48 | * "large page" address mask and size definitions. | ||
49 | */ | ||
50 | #define IOLARGE_SHIFT 16 | ||
51 | #define IOLARGE_SIZE (1UL << IOLARGE_SHIFT) | ||
52 | #define IOLARGE_MASK (~(IOLARGE_SIZE - 1)) | ||
53 | |||
54 | #define PTRS_PER_IOPTE (1UL << (IOPGD_SHIFT - IOPTE_SHIFT)) | ||
55 | #define IOPTE_TABLE_SIZE (PTRS_PER_IOPTE * sizeof(u32)) | ||
56 | |||
57 | #define IOPAGE_MASK IOPTE_MASK | ||
58 | |||
59 | /** | ||
60 | * omap_iommu_translate() - va to pa translation | ||
61 | * @d: omap iommu descriptor | ||
62 | * @va: virtual address | ||
63 | * @mask: omap iommu descriptor mask | ||
64 | * | ||
65 | * va to pa translation | ||
66 | */ | ||
67 | static inline phys_addr_t omap_iommu_translate(u32 d, u32 va, u32 mask) | ||
68 | { | ||
69 | return (d & mask) | (va & (~mask)); | ||
70 | } | ||
71 | |||
72 | /* | ||
73 | * some descriptor attributes. | ||
74 | */ | ||
75 | #define IOPGD_TABLE (1 << 0) | ||
76 | #define IOPGD_SECTION (2 << 0) | ||
77 | #define IOPGD_SUPER (1 << 18 | 2 << 0) | ||
78 | |||
79 | #define iopgd_is_table(x) (((x) & 3) == IOPGD_TABLE) | ||
80 | #define iopgd_is_section(x) (((x) & (1 << 18 | 3)) == IOPGD_SECTION) | ||
81 | #define iopgd_is_super(x) (((x) & (1 << 18 | 3)) == IOPGD_SUPER) | ||
82 | |||
83 | #define IOPTE_SMALL (2 << 0) | ||
84 | #define IOPTE_LARGE (1 << 0) | ||
85 | |||
86 | #define iopte_is_small(x) (((x) & 2) == IOPTE_SMALL) | ||
87 | #define iopte_is_large(x) (((x) & 3) == IOPTE_LARGE) | ||
88 | |||
89 | /* to find an entry in a page-table-directory */ | ||
90 | #define iopgd_index(da) (((da) >> IOPGD_SHIFT) & (PTRS_PER_IOPGD - 1)) | ||
91 | #define iopgd_offset(obj, da) ((obj)->iopgd + iopgd_index(da)) | ||
92 | |||
93 | #define iopgd_page_paddr(iopgd) (*iopgd & ~((1 << 10) - 1)) | ||
94 | #define iopgd_page_vaddr(iopgd) ((u32 *)phys_to_virt(iopgd_page_paddr(iopgd))) | ||
95 | |||
96 | /* to find an entry in the second-level page table. */ | ||
97 | #define iopte_index(da) (((da) >> IOPTE_SHIFT) & (PTRS_PER_IOPTE - 1)) | ||
98 | #define iopte_offset(iopgd, da) (iopgd_page_vaddr(iopgd) + iopte_index(da)) | ||
99 | |||
100 | static inline u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa, | ||
101 | u32 flags) | ||
102 | { | ||
103 | memset(e, 0, sizeof(*e)); | ||
104 | |||
105 | e->da = da; | ||
106 | e->pa = pa; | ||
107 | e->valid = 1; | ||
108 | /* FIXME: add OMAP1 support */ | ||
109 | e->pgsz = flags & MMU_CAM_PGSZ_MASK; | ||
110 | e->endian = flags & MMU_RAM_ENDIAN_MASK; | ||
111 | e->elsz = flags & MMU_RAM_ELSZ_MASK; | ||
112 | e->mixed = flags & MMU_RAM_MIXED_MASK; | ||
113 | |||
114 | return iopgsz_to_bytes(e->pgsz); | ||
115 | } | ||
116 | |||
117 | #define to_iommu(dev) \ | ||
118 | (struct omap_iommu *)platform_get_drvdata(to_platform_device(dev)) | ||
119 | |||
120 | #endif /* __PLAT_OMAP_IOMMU_H */ | ||
diff --git a/arch/arm/plat-omap/include/plat/iovmm.h b/arch/arm/plat-omap/include/plat/iovmm.h deleted file mode 100644 index 498e57cda6cd..000000000000 --- a/arch/arm/plat-omap/include/plat/iovmm.h +++ /dev/null | |||
@@ -1,89 +0,0 @@ | |||
1 | /* | ||
2 | * omap iommu: simple virtual address space management | ||
3 | * | ||
4 | * Copyright (C) 2008-2009 Nokia Corporation | ||
5 | * | ||
6 | * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __IOMMU_MMAP_H | ||
14 | #define __IOMMU_MMAP_H | ||
15 | |||
16 | #include <linux/iommu.h> | ||
17 | |||
18 | struct iovm_struct { | ||
19 | struct omap_iommu *iommu; /* iommu object which this belongs to */ | ||
20 | u32 da_start; /* area definition */ | ||
21 | u32 da_end; | ||
22 | u32 flags; /* IOVMF_: see below */ | ||
23 | struct list_head list; /* linked in ascending order */ | ||
24 | const struct sg_table *sgt; /* keep 'page' <-> 'da' mapping */ | ||
25 | void *va; /* mpu side mapped address */ | ||
26 | }; | ||
27 | |||
28 | /* | ||
29 | * IOVMF_FLAGS: attribute for iommu virtual memory area(iovma) | ||
30 | * | ||
31 | * lower 16 bit is used for h/w and upper 16 bit is for s/w. | ||
32 | */ | ||
33 | #define IOVMF_SW_SHIFT 16 | ||
34 | |||
35 | /* | ||
36 | * iovma: h/w flags derived from cam and ram attribute | ||
37 | */ | ||
38 | #define IOVMF_CAM_MASK (~((1 << 10) - 1)) | ||
39 | #define IOVMF_RAM_MASK (~IOVMF_CAM_MASK) | ||
40 | |||
41 | #define IOVMF_PGSZ_MASK (3 << 0) | ||
42 | #define IOVMF_PGSZ_1M MMU_CAM_PGSZ_1M | ||
43 | #define IOVMF_PGSZ_64K MMU_CAM_PGSZ_64K | ||
44 | #define IOVMF_PGSZ_4K MMU_CAM_PGSZ_4K | ||
45 | #define IOVMF_PGSZ_16M MMU_CAM_PGSZ_16M | ||
46 | |||
47 | #define IOVMF_ENDIAN_MASK (1 << 9) | ||
48 | #define IOVMF_ENDIAN_BIG MMU_RAM_ENDIAN_BIG | ||
49 | #define IOVMF_ENDIAN_LITTLE MMU_RAM_ENDIAN_LITTLE | ||
50 | |||
51 | #define IOVMF_ELSZ_MASK (3 << 7) | ||
52 | #define IOVMF_ELSZ_8 MMU_RAM_ELSZ_8 | ||
53 | #define IOVMF_ELSZ_16 MMU_RAM_ELSZ_16 | ||
54 | #define IOVMF_ELSZ_32 MMU_RAM_ELSZ_32 | ||
55 | #define IOVMF_ELSZ_NONE MMU_RAM_ELSZ_NONE | ||
56 | |||
57 | #define IOVMF_MIXED_MASK (1 << 6) | ||
58 | #define IOVMF_MIXED MMU_RAM_MIXED | ||
59 | |||
60 | /* | ||
61 | * iovma: s/w flags, used for mapping and umapping internally. | ||
62 | */ | ||
63 | #define IOVMF_MMIO (1 << IOVMF_SW_SHIFT) | ||
64 | #define IOVMF_ALLOC (2 << IOVMF_SW_SHIFT) | ||
65 | #define IOVMF_ALLOC_MASK (3 << IOVMF_SW_SHIFT) | ||
66 | |||
67 | /* "superpages" is supported just with physically linear pages */ | ||
68 | #define IOVMF_DISCONT (1 << (2 + IOVMF_SW_SHIFT)) | ||
69 | #define IOVMF_LINEAR (2 << (2 + IOVMF_SW_SHIFT)) | ||
70 | #define IOVMF_LINEAR_MASK (3 << (2 + IOVMF_SW_SHIFT)) | ||
71 | |||
72 | #define IOVMF_DA_FIXED (1 << (4 + IOVMF_SW_SHIFT)) | ||
73 | |||
74 | |||
75 | extern struct iovm_struct *omap_find_iovm_area(struct device *dev, u32 da); | ||
76 | extern u32 | ||
77 | omap_iommu_vmap(struct iommu_domain *domain, struct device *dev, u32 da, | ||
78 | const struct sg_table *sgt, u32 flags); | ||
79 | extern struct sg_table *omap_iommu_vunmap(struct iommu_domain *domain, | ||
80 | struct device *dev, u32 da); | ||
81 | extern u32 | ||
82 | omap_iommu_vmalloc(struct iommu_domain *domain, struct device *dev, | ||
83 | u32 da, size_t bytes, u32 flags); | ||
84 | extern void | ||
85 | omap_iommu_vfree(struct iommu_domain *domain, struct device *dev, | ||
86 | const u32 da); | ||
87 | extern void *omap_da_to_va(struct device *dev, u32 da); | ||
88 | |||
89 | #endif /* __IOMMU_MMAP_H */ | ||