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authorTony Lindgren <tony@atomide.com>2010-12-10 14:37:47 -0500
committerTony Lindgren <tony@atomide.com>2010-12-10 14:37:47 -0500
commit79b357c2171ab3e52148503f0efa66d64a13413e (patch)
tree7f134ef19ae4a882b32da87ce3d3ed9e5134691a /arch/arm/plat-omap/include/plat/gpio.h
parentb2d6fef51223a1913c0d3230df4252ab49990bc1 (diff)
parent5de62b86d2f5cf3459cb02ecb7a4530787bbd898 (diff)
Merge branch 'devel-gpio' into omap-for-linus
Diffstat (limited to 'arch/arm/plat-omap/include/plat/gpio.h')
-rw-r--r--arch/arm/plat-omap/include/plat/gpio.h46
1 files changed, 28 insertions, 18 deletions
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index de1c604962eb..41ff2f8943f0 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -27,26 +27,15 @@
27#define __ASM_ARCH_OMAP_GPIO_H 27#define __ASM_ARCH_OMAP_GPIO_H
28 28
29#include <linux/io.h> 29#include <linux/io.h>
30#include <linux/platform_device.h>
30#include <mach/irqs.h> 31#include <mach/irqs.h>
31 32
32#define OMAP1_MPUIO_BASE 0xfffb5000 33#define OMAP1_MPUIO_BASE 0xfffb5000
33 34
34#if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)) 35/*
35 36 * These are the omap15xx/16xx offsets. The omap7xx offset are
36#define OMAP_MPUIO_INPUT_LATCH 0x00 37 * OMAP_MPUIO_ / 2 offsets below.
37#define OMAP_MPUIO_OUTPUT 0x02 38 */
38#define OMAP_MPUIO_IO_CNTL 0x04
39#define OMAP_MPUIO_KBR_LATCH 0x08
40#define OMAP_MPUIO_KBC 0x0a
41#define OMAP_MPUIO_GPIO_EVENT_MODE 0x0c
42#define OMAP_MPUIO_GPIO_INT_EDGE 0x0e
43#define OMAP_MPUIO_KBD_INT 0x10
44#define OMAP_MPUIO_GPIO_INT 0x12
45#define OMAP_MPUIO_KBD_MASKIT 0x14
46#define OMAP_MPUIO_GPIO_MASKIT 0x16
47#define OMAP_MPUIO_GPIO_DEBOUNCING 0x18
48#define OMAP_MPUIO_LATCH 0x1a
49#else
50#define OMAP_MPUIO_INPUT_LATCH 0x00 39#define OMAP_MPUIO_INPUT_LATCH 0x00
51#define OMAP_MPUIO_OUTPUT 0x04 40#define OMAP_MPUIO_OUTPUT 0x04
52#define OMAP_MPUIO_IO_CNTL 0x08 41#define OMAP_MPUIO_IO_CNTL 0x08
@@ -60,7 +49,6 @@
60#define OMAP_MPUIO_GPIO_MASKIT 0x2c 49#define OMAP_MPUIO_GPIO_MASKIT 0x2c
61#define OMAP_MPUIO_GPIO_DEBOUNCING 0x30 50#define OMAP_MPUIO_GPIO_DEBOUNCING 0x30
62#define OMAP_MPUIO_LATCH 0x34 51#define OMAP_MPUIO_LATCH 0x34
63#endif
64 52
65#define OMAP34XX_NR_GPIOS 6 53#define OMAP34XX_NR_GPIOS 6
66 54
@@ -71,7 +59,29 @@
71 IH_MPUIO_BASE + ((nr) & 0x0f) : \ 59 IH_MPUIO_BASE + ((nr) & 0x0f) : \
72 IH_GPIO_BASE + (nr)) 60 IH_GPIO_BASE + (nr))
73 61
74extern int omap_gpio_init(void); /* Call from board init only */ 62#define METHOD_MPUIO 0
63#define METHOD_GPIO_1510 1
64#define METHOD_GPIO_1610 2
65#define METHOD_GPIO_7XX 3
66#define METHOD_GPIO_24XX 5
67#define METHOD_GPIO_44XX 6
68
69struct omap_gpio_dev_attr {
70 int bank_width; /* GPIO bank width */
71 bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
72};
73
74struct omap_gpio_platform_data {
75 u16 virtual_irq_start;
76 int bank_type;
77 int bank_width; /* GPIO bank width */
78 int bank_stride; /* Only needed for omap1 MPUIO */
79 bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
80};
81
82/* TODO: Analyze removing gpio_bank_count usage from driver code */
83extern int gpio_bank_count;
84
75extern void omap2_gpio_prepare_for_idle(int power_state); 85extern void omap2_gpio_prepare_for_idle(int power_state);
76extern void omap2_gpio_resume_after_idle(void); 86extern void omap2_gpio_resume_after_idle(void);
77extern void omap_set_gpio_debounce(int gpio, int enable); 87extern void omap_set_gpio_debounce(int gpio, int enable);