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authorTony Lindgren <tony@atomide.com>2009-08-28 13:50:33 -0400
committerTony Lindgren <tony@atomide.com>2009-08-28 13:50:33 -0400
commit941132606c7611246d2034cb7b01f9270c2d1ede (patch)
treee53a618c4e98d3716551afa2e6cfae2be81056a0 /arch/arm/plat-omap/include/mach
parent326ba5010a5429a5a528b268b36a5900d4ab0eba (diff)
OMAP: Remove OMAP_IO_ADDRESS, use OMAP1_IO_ADDRESS and OMAP2_IO_ADDRESS instead
Search and replace OMAP_IO_ADDRESS with OMAP1_IO_ADDRESS and OMAP2_IO_ADDRESS, and convert omap_read/write into a functions instead of a macros. Also rename OMAP_MPUIO_VBASE to OMAP1_MPUIO_VBASE. In the long run, most code should use ioremap + __raw_read/write instead. Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/include/mach')
-rw-r--r--arch/arm/plat-omap/include/mach/control.h12
-rw-r--r--arch/arm/plat-omap/include/mach/entry-macro.S8
-rw-r--r--arch/arm/plat-omap/include/mach/io.h64
-rw-r--r--arch/arm/plat-omap/include/mach/mtd-xip.h2
-rw-r--r--arch/arm/plat-omap/include/mach/omap44xx.h8
-rw-r--r--arch/arm/plat-omap/include/mach/sdrc.h6
6 files changed, 39 insertions, 61 deletions
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h
index 8140dbccb7bc..826d317cdbec 100644
--- a/arch/arm/plat-omap/include/mach/control.h
+++ b/arch/arm/plat-omap/include/mach/control.h
@@ -20,15 +20,15 @@
20 20
21#ifndef __ASSEMBLY__ 21#ifndef __ASSEMBLY__
22#define OMAP242X_CTRL_REGADDR(reg) \ 22#define OMAP242X_CTRL_REGADDR(reg) \
23 IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) 23 OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
24#define OMAP243X_CTRL_REGADDR(reg) \ 24#define OMAP243X_CTRL_REGADDR(reg) \
25 IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) 25 OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
26#define OMAP343X_CTRL_REGADDR(reg) \ 26#define OMAP343X_CTRL_REGADDR(reg) \
27 IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) 27 OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
28#else 28#else
29#define OMAP242X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) 29#define OMAP242X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
30#define OMAP243X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) 30#define OMAP243X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
31#define OMAP343X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) 31#define OMAP343X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
32#endif /* __ASSEMBLY__ */ 32#endif /* __ASSEMBLY__ */
33 33
34/* 34/*
diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S
index 56426ed45ef4..a5592991634d 100644
--- a/arch/arm/plat-omap/include/mach/entry-macro.S
+++ b/arch/arm/plat-omap/include/mach/entry-macro.S
@@ -41,7 +41,7 @@
41 .endm 41 .endm
42 42
43 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 43 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
44 ldr \base, =IO_ADDRESS(OMAP_IH1_BASE) 44 ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE)
45 ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] 45 ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET]
46 ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET] 46 ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET]
47 mov \irqstat, #0xffffffff 47 mov \irqstat, #0xffffffff
@@ -53,7 +53,7 @@
53 cmp \irqnr, #0 53 cmp \irqnr, #0
54 ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] 54 ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
55 cmpeq \irqnr, #INT_IH2_IRQ 55 cmpeq \irqnr, #INT_IH2_IRQ
56 ldreq \base, =IO_ADDRESS(OMAP_IH2_BASE) 56 ldreq \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE)
57 ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] 57 ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
58 addeqs \irqnr, \irqnr, #32 58 addeqs \irqnr, \irqnr, #32
591510: 591510:
@@ -68,9 +68,9 @@
68 68
69/* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */ 69/* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */
70#if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430) 70#if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430)
71#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE) 71#define OMAP2_VA_IC_BASE OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE)
72#elif defined(CONFIG_ARCH_OMAP34XX) 72#elif defined(CONFIG_ARCH_OMAP34XX)
73#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP34XX_IC_BASE) 73#define OMAP2_VA_IC_BASE OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE)
74#endif 74#endif
75#if defined(CONFIG_ARCH_OMAP4) 75#if defined(CONFIG_ARCH_OMAP4)
76#include <mach/omap44xx.h> 76#include <mach/omap44xx.h>
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index 21fb0efdda86..55659809478e 100644
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -54,15 +54,23 @@
54 * ---------------------------------------------------------------------------- 54 * ----------------------------------------------------------------------------
55 */ 55 */
56 56
57#ifdef __ASSEMBLER__
58#define IOMEM(x) (x)
59#else
60#define IOMEM(x) ((void __force __iomem *)(x))
61#endif
62
63#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
64#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET)
65
66#define OMAP2_IO_OFFSET 0x90000000
67#define OMAP2_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_IO_OFFSET) /* L3 and L4 */
68
57#if defined(CONFIG_ARCH_OMAP1) 69#if defined(CONFIG_ARCH_OMAP1)
58 70
59#define IO_PHYS 0xFFFB0000 71#define IO_PHYS 0xFFFB0000
60#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
61#define IO_SIZE 0x40000 72#define IO_SIZE 0x40000
62#define IO_VIRT (IO_PHYS - IO_OFFSET) 73#define IO_VIRT (IO_PHYS - OMAP1_IO_OFFSET)
63#define __IO_ADDRESS(pa) ((pa) - IO_OFFSET)
64#define __OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET)
65#define io_v2p(va) ((va) + IO_OFFSET)
66 74
67#elif defined(CONFIG_ARCH_OMAP2) 75#elif defined(CONFIG_ARCH_OMAP2)
68 76
@@ -87,11 +95,6 @@
87#define OMAP243X_SMS_VIRT 0xFC000000 95#define OMAP243X_SMS_VIRT 0xFC000000
88#define OMAP243X_SMS_SIZE SZ_1M 96#define OMAP243X_SMS_SIZE SZ_1M
89 97
90#define IO_OFFSET 0x90000000
91#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
92#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
93#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */
94
95/* DSP */ 98/* DSP */
96#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ 99#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */
97#define DSP_MEM_24XX_VIRT 0xe0000000 100#define DSP_MEM_24XX_VIRT 0xe0000000
@@ -143,12 +146,6 @@
143#define OMAP343X_SDRC_VIRT 0xFD000000 146#define OMAP343X_SDRC_VIRT 0xFD000000
144#define OMAP343X_SDRC_SIZE SZ_1M 147#define OMAP343X_SDRC_SIZE SZ_1M
145 148
146
147#define IO_OFFSET 0x90000000
148#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
149#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
150#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */
151
152/* DSP */ 149/* DSP */
153#define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */ 150#define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */
154#define DSP_MEM_34XX_VIRT 0xe0000000 151#define DSP_MEM_34XX_VIRT 0xe0000000
@@ -188,39 +185,20 @@
188#define OMAP44XX_GPMC_VIRT 0xe0000000 185#define OMAP44XX_GPMC_VIRT 0xe0000000
189#define OMAP44XX_GPMC_SIZE SZ_1M 186#define OMAP44XX_GPMC_SIZE SZ_1M
190 187
191
192#define IO_OFFSET 0x90000000
193#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
194#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
195#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */
196
197#endif 188#endif
198 189
199#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa)) 190#ifndef __ASSEMBLER__
200#define OMAP1_IO_ADDRESS(pa) IOMEM(__OMAP1_IO_ADDRESS(pa))
201#define OMAP2_IO_ADDRESS(pa) IOMEM(__OMAP2_IO_ADDRESS(pa))
202
203#ifdef __ASSEMBLER__
204#define IOMEM(x) (x)
205#else
206#define IOMEM(x) ((void __force __iomem *)(x))
207 191
208/* 192/*
209 * Functions to access the OMAP IO region 193 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
210 *
211 * NOTE: - Use omap_read/write[bwl] for physical register addresses
212 * - Use __raw_read/write[bwl]() for virtual register addresses
213 * - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses
214 * - DO NOT use hardcoded virtual addresses to allow changing the
215 * IO address space again if needed
216 */ 194 */
217#define omap_readb(a) __raw_readb(IO_ADDRESS(a))
218#define omap_readw(a) __raw_readw(IO_ADDRESS(a))
219#define omap_readl(a) __raw_readl(IO_ADDRESS(a))
220 195
221#define omap_writeb(v,a) __raw_writeb(v, IO_ADDRESS(a)) 196extern u8 omap_readb(u32 pa);
222#define omap_writew(v,a) __raw_writew(v, IO_ADDRESS(a)) 197extern u16 omap_readw(u32 pa);
223#define omap_writel(v,a) __raw_writel(v, IO_ADDRESS(a)) 198extern u32 omap_readl(u32 pa);
199extern void omap_writeb(u8 v, u32 pa);
200extern void omap_writew(u16 v, u32 pa);
201extern void omap_writel(u32 v, u32 pa);
224 202
225struct omap_sdrc_params; 203struct omap_sdrc_params;
226 204
diff --git a/arch/arm/plat-omap/include/mach/mtd-xip.h b/arch/arm/plat-omap/include/mach/mtd-xip.h
index 39b591ff54bb..f82a8dcaad94 100644
--- a/arch/arm/plat-omap/include/mach/mtd-xip.h
+++ b/arch/arm/plat-omap/include/mach/mtd-xip.h
@@ -25,7 +25,7 @@ typedef struct {
25} xip_omap_mpu_timer_regs_t; 25} xip_omap_mpu_timer_regs_t;
26 26
27#define xip_omap_mpu_timer_base(n) \ 27#define xip_omap_mpu_timer_base(n) \
28((volatile xip_omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ 28((volatile xip_omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \
29 (n)*OMAP_MPU_TIMER_OFFSET)) 29 (n)*OMAP_MPU_TIMER_OFFSET))
30 30
31static inline unsigned long xip_omap_mpu_timer_read(int nr) 31static inline unsigned long xip_omap_mpu_timer_read(int nr)
diff --git a/arch/arm/plat-omap/include/mach/omap44xx.h b/arch/arm/plat-omap/include/mach/omap44xx.h
index 15dec7f1c7c0..b3ba5ac7b4a4 100644
--- a/arch/arm/plat-omap/include/mach/omap44xx.h
+++ b/arch/arm/plat-omap/include/mach/omap44xx.h
@@ -33,14 +33,14 @@
33#define IRQ_SIR_IRQ 0x0040 33#define IRQ_SIR_IRQ 0x0040
34#define OMAP44XX_GIC_DIST_BASE 0x48241000 34#define OMAP44XX_GIC_DIST_BASE 0x48241000
35#define OMAP44XX_GIC_CPU_BASE 0x48240100 35#define OMAP44XX_GIC_CPU_BASE 0x48240100
36#define OMAP44XX_VA_GIC_CPU_BASE IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) 36#define OMAP44XX_VA_GIC_CPU_BASE OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
37#define OMAP44XX_SCU_BASE 0x48240000 37#define OMAP44XX_SCU_BASE 0x48240000
38#define OMAP44XX_VA_SCU_BASE IO_ADDRESS(OMAP44XX_SCU_BASE) 38#define OMAP44XX_VA_SCU_BASE OMAP2_IO_ADDRESS(OMAP44XX_SCU_BASE)
39#define OMAP44XX_LOCAL_TWD_BASE 0x48240600 39#define OMAP44XX_LOCAL_TWD_BASE 0x48240600
40#define OMAP44XX_VA_LOCAL_TWD_BASE IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE) 40#define OMAP44XX_VA_LOCAL_TWD_BASE OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE)
41#define OMAP44XX_LOCAL_TWD_SIZE 0x00000100 41#define OMAP44XX_LOCAL_TWD_SIZE 0x00000100
42#define OMAP44XX_WKUPGEN_BASE 0x48281000 42#define OMAP44XX_WKUPGEN_BASE 0x48281000
43#define OMAP44XX_VA_WKUPGEN_BASE IO_ADDRESS(OMAP44XX_WKUPGEN_BASE) 43#define OMAP44XX_VA_WKUPGEN_BASE OMAP2_IO_ADDRESS(OMAP44XX_WKUPGEN_BASE)
44 44
45#endif /* __ASM_ARCH_OMAP44XX_H */ 45#endif /* __ASM_ARCH_OMAP44XX_H */
46 46
diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h
index 0be18e4ff182..93f70d2cbce1 100644
--- a/arch/arm/plat-omap/include/mach/sdrc.h
+++ b/arch/arm/plat-omap/include/mach/sdrc.h
@@ -71,11 +71,11 @@
71 */ 71 */
72 72
73#define OMAP242X_SMS_REGADDR(reg) \ 73#define OMAP242X_SMS_REGADDR(reg) \
74 (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg) 74 (void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE + reg)
75#define OMAP243X_SMS_REGADDR(reg) \ 75#define OMAP243X_SMS_REGADDR(reg) \
76 (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg) 76 (void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE + reg)
77#define OMAP343X_SMS_REGADDR(reg) \ 77#define OMAP343X_SMS_REGADDR(reg) \
78 (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg) 78 (void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE + reg)
79 79
80/* SMS register offsets - read/write with sms_{read,write}_reg() */ 80/* SMS register offsets - read/write with sms_{read,write}_reg() */
81 81