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author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-28 17:03:14 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-28 17:03:14 -0400 |
commit | 0fe41b8982001cd14ee2c77cd776735a5024e98b (patch) | |
tree | 83e65d595c413d55259ea14fb97748ce5efe5707 /arch/arm/plat-omap/include/mach/omap34xx.h | |
parent | eedf2c5296a8dfaaf9aec1a938c1d3bd73159a30 (diff) | |
parent | 9759d22c8348343b0da4e25d6150c41712686c14 (diff) |
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (422 commits)
[ARM] 5435/1: fix compile warning in sanity_check_meminfo()
[ARM] 5434/1: ARM: OMAP: Fix mailbox compile for 24xx
[ARM] pxa: fix the bad assumption that PCMCIA sockets always start with 0
[ARM] pxa: fix Colibri PXA300 and PXA320 LCD backlight pins
imxfb: Fix TFT mode
i.MX21/27: remove ifdef CONFIG_FB_IMX
imxfb: add clock support
mxc: add arch_reset() function
clkdev: add possibility to get a clock based on the device name
i.MX1: remove fb support from mach-imx
[ARM] pxa: build arch/arm/plat-pxa/mfp.c only when PXA3xx or ARCH_MMP defined
Gemini: Add support for Teltonika RUT100
Gemini: gpiolib based GPIO support v2
MAINTAINERS: add myself as Gemini architecture maintainer
ARM: Add Gemini architecture v3
[ARM] OMAP: Fix compile for omap2_init_common_hw()
MAINTAINERS: Add myself as Faraday ARM core variant maintainer
ARM: Add support for FA526 v2
[ARM] acorn,ebsa110,footbridge,integrator,sa1100: Convert asm/io.h to linux/io.h
[ARM] collie: fix two minor formatting nits
...
Diffstat (limited to 'arch/arm/plat-omap/include/mach/omap34xx.h')
-rw-r--r-- | arch/arm/plat-omap/include/mach/omap34xx.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/mach/omap34xx.h b/arch/arm/plat-omap/include/mach/omap34xx.h index 8e0479fff05a..ab640151d3ec 100644 --- a/arch/arm/plat-omap/include/mach/omap34xx.h +++ b/arch/arm/plat-omap/include/mach/omap34xx.h | |||
@@ -49,11 +49,39 @@ | |||
49 | #define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE | 49 | #define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE |
50 | 50 | ||
51 | #define OMAP34XX_IC_BASE 0x48200000 | 51 | #define OMAP34XX_IC_BASE 0x48200000 |
52 | |||
53 | #define OMAP3430_ISP_BASE (L4_34XX_BASE + 0xBC000) | ||
54 | #define OMAP3430_ISP_CBUFF_BASE (OMAP3430_ISP_BASE + 0x0100) | ||
55 | #define OMAP3430_ISP_CCP2_BASE (OMAP3430_ISP_BASE + 0x0400) | ||
56 | #define OMAP3430_ISP_CCDC_BASE (OMAP3430_ISP_BASE + 0x0600) | ||
57 | #define OMAP3430_ISP_HIST_BASE (OMAP3430_ISP_BASE + 0x0A00) | ||
58 | #define OMAP3430_ISP_H3A_BASE (OMAP3430_ISP_BASE + 0x0C00) | ||
59 | #define OMAP3430_ISP_PREV_BASE (OMAP3430_ISP_BASE + 0x0E00) | ||
60 | #define OMAP3430_ISP_RESZ_BASE (OMAP3430_ISP_BASE + 0x1000) | ||
61 | #define OMAP3430_ISP_SBL_BASE (OMAP3430_ISP_BASE + 0x1200) | ||
62 | #define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400) | ||
63 | #define OMAP3430_ISP_CSI2A_BASE (OMAP3430_ISP_BASE + 0x1800) | ||
64 | #define OMAP3430_ISP_CSI2PHY_BASE (OMAP3430_ISP_BASE + 0x1970) | ||
65 | |||
66 | #define OMAP3430_ISP_END (OMAP3430_ISP_BASE + 0x06F) | ||
67 | #define OMAP3430_ISP_CBUFF_END (OMAP3430_ISP_CBUFF_BASE + 0x077) | ||
68 | #define OMAP3430_ISP_CCP2_END (OMAP3430_ISP_CCP2_BASE + 0x1EF) | ||
69 | #define OMAP3430_ISP_CCDC_END (OMAP3430_ISP_CCDC_BASE + 0x0A7) | ||
70 | #define OMAP3430_ISP_HIST_END (OMAP3430_ISP_HIST_BASE + 0x047) | ||
71 | #define OMAP3430_ISP_H3A_END (OMAP3430_ISP_H3A_BASE + 0x05F) | ||
72 | #define OMAP3430_ISP_PREV_END (OMAP3430_ISP_PREV_BASE + 0x09F) | ||
73 | #define OMAP3430_ISP_RESZ_END (OMAP3430_ISP_RESZ_BASE + 0x0AB) | ||
74 | #define OMAP3430_ISP_SBL_END (OMAP3430_ISP_SBL_BASE + 0x0FB) | ||
75 | #define OMAP3430_ISP_MMU_END (OMAP3430_ISP_MMU_BASE + 0x06F) | ||
76 | #define OMAP3430_ISP_CSI2A_END (OMAP3430_ISP_CSI2A_BASE + 0x16F) | ||
77 | #define OMAP3430_ISP_CSI2PHY_END (OMAP3430_ISP_CSI2PHY_BASE + 0x007) | ||
78 | |||
52 | #define OMAP34XX_IVA_INTC_BASE 0x40000000 | 79 | #define OMAP34XX_IVA_INTC_BASE 0x40000000 |
53 | #define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) | 80 | #define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) |
54 | #define OMAP34XX_HSUSB_HOST_BASE (L4_34XX_BASE + 0x64000) | 81 | #define OMAP34XX_HSUSB_HOST_BASE (L4_34XX_BASE + 0x64000) |
55 | #define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000) | 82 | #define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000) |
56 | 83 | ||
84 | #define OMAP34XX_MAILBOX_BASE (L4_34XX_BASE + 0x94000) | ||
57 | 85 | ||
58 | #if defined(CONFIG_ARCH_OMAP3430) | 86 | #if defined(CONFIG_ARCH_OMAP3430) |
59 | 87 | ||