diff options
author | Tony Lindgren <tony@atomide.com> | 2008-10-06 08:49:36 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2008-10-06 08:49:36 -0400 |
commit | 646e3ed1a349fbccce651fed2d3987f0e7b0f0f4 (patch) | |
tree | b9c4d52027da1468e52294f3f8db3afb0720c86d /arch/arm/plat-omap/include/mach/irqs.h | |
parent | fd1dc87ded0f29c1ba1e8da62f03ab0d591d9bdd (diff) |
ARM: OMAP2: Misc updates from linux-omap tree
Misc updates from linux-omap tree, mostly to update common
device initialization and add missing defines from linux-omap
tree. Also some changes to make room for adding 34xx in
following patches.
Note that the I2C resources are now set up in
arch/arm/plat-omap/i2c.c helper, and can be removed
from devices.c.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/include/mach/irqs.h')
-rw-r--r-- | arch/arm/plat-omap/include/mach/irqs.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h index 17248bbf3f27..e9fd63055cb2 100644 --- a/arch/arm/plat-omap/include/mach/irqs.h +++ b/arch/arm/plat-omap/include/mach/irqs.h | |||
@@ -125,6 +125,7 @@ | |||
125 | #define INT_UART2 (15 + IH2_BASE) | 125 | #define INT_UART2 (15 + IH2_BASE) |
126 | #define INT_BT_MCSI1TX (16 + IH2_BASE) | 126 | #define INT_BT_MCSI1TX (16 + IH2_BASE) |
127 | #define INT_BT_MCSI1RX (17 + IH2_BASE) | 127 | #define INT_BT_MCSI1RX (17 + IH2_BASE) |
128 | #define INT_SOSSI_MATCH (19 + IH2_BASE) | ||
128 | #define INT_USB_W2FC (20 + IH2_BASE) | 129 | #define INT_USB_W2FC (20 + IH2_BASE) |
129 | #define INT_1WIRE (21 + IH2_BASE) | 130 | #define INT_1WIRE (21 + IH2_BASE) |
130 | #define INT_OS_TIMER (22 + IH2_BASE) | 131 | #define INT_OS_TIMER (22 + IH2_BASE) |
@@ -176,6 +177,7 @@ | |||
176 | #define INT_1610_DMA_CH14 (61 + IH2_BASE) | 177 | #define INT_1610_DMA_CH14 (61 + IH2_BASE) |
177 | #define INT_1610_DMA_CH15 (62 + IH2_BASE) | 178 | #define INT_1610_DMA_CH15 (62 + IH2_BASE) |
178 | #define INT_1610_NAND (63 + IH2_BASE) | 179 | #define INT_1610_NAND (63 + IH2_BASE) |
180 | #define INT_1610_SHA1MD5 (91 + IH2_BASE) | ||
179 | 181 | ||
180 | /* | 182 | /* |
181 | * OMAP-730 specific IRQ numbers for interrupt handler 2 | 183 | * OMAP-730 specific IRQ numbers for interrupt handler 2 |
@@ -263,12 +265,16 @@ | |||
263 | #define INT_24XX_GPTIMER10 46 | 265 | #define INT_24XX_GPTIMER10 46 |
264 | #define INT_24XX_GPTIMER11 47 | 266 | #define INT_24XX_GPTIMER11 47 |
265 | #define INT_24XX_GPTIMER12 48 | 267 | #define INT_24XX_GPTIMER12 48 |
268 | #define INT_24XX_SHA1MD5 51 | ||
266 | #define INT_24XX_I2C1_IRQ 56 | 269 | #define INT_24XX_I2C1_IRQ 56 |
267 | #define INT_24XX_I2C2_IRQ 57 | 270 | #define INT_24XX_I2C2_IRQ 57 |
271 | #define INT_24XX_HDQ_IRQ 58 | ||
268 | #define INT_24XX_MCBSP1_IRQ_TX 59 | 272 | #define INT_24XX_MCBSP1_IRQ_TX 59 |
269 | #define INT_24XX_MCBSP1_IRQ_RX 60 | 273 | #define INT_24XX_MCBSP1_IRQ_RX 60 |
270 | #define INT_24XX_MCBSP2_IRQ_TX 62 | 274 | #define INT_24XX_MCBSP2_IRQ_TX 62 |
271 | #define INT_24XX_MCBSP2_IRQ_RX 63 | 275 | #define INT_24XX_MCBSP2_IRQ_RX 63 |
276 | #define INT_24XX_SPI1_IRQ 65 | ||
277 | #define INT_24XX_SPI2_IRQ 66 | ||
272 | #define INT_24XX_UART1_IRQ 72 | 278 | #define INT_24XX_UART1_IRQ 72 |
273 | #define INT_24XX_UART2_IRQ 73 | 279 | #define INT_24XX_UART2_IRQ 73 |
274 | #define INT_24XX_UART3_IRQ 74 | 280 | #define INT_24XX_UART3_IRQ 74 |