diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-08-05 11:14:15 -0400 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-08-07 04:55:48 -0400 |
commit | a09e64fbc0094e3073dbb09c3b4bfe4ab669244b (patch) | |
tree | 69689f467179891b498bd7423fcf61925173db31 /arch/arm/plat-omap/include/mach/io.h | |
parent | a1b81a84fff05dbfef45b7012c26e1fee9973e5d (diff) |
[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-omap/include/mach/io.h')
-rw-r--r-- | arch/arm/plat-omap/include/mach/io.h | 197 |
1 files changed, 197 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h new file mode 100644 index 000000000000..2a30b7d88cde --- /dev/null +++ b/arch/arm/plat-omap/include/mach/io.h | |||
@@ -0,0 +1,197 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-omap/include/mach/io.h | ||
3 | * | ||
4 | * IO definitions for TI OMAP processors and boards | ||
5 | * | ||
6 | * Copied from arch/arm/mach-sa1100/include/mach/io.h | ||
7 | * Copyright (C) 1997-1999 Russell King | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify it | ||
10 | * under the terms of the GNU General Public License as published by the | ||
11 | * Free Software Foundation; either version 2 of the License, or (at your | ||
12 | * option) any later version. | ||
13 | * | ||
14 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
15 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
16 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
17 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
18 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
19 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
20 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
21 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
22 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
23 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
24 | * | ||
25 | * You should have received a copy of the GNU General Public License along | ||
26 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
27 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
28 | * | ||
29 | * Modifications: | ||
30 | * 06-12-1997 RMK Created. | ||
31 | * 07-04-1999 RMK Major cleanup | ||
32 | */ | ||
33 | |||
34 | #ifndef __ASM_ARM_ARCH_IO_H | ||
35 | #define __ASM_ARM_ARCH_IO_H | ||
36 | |||
37 | #include <mach/hardware.h> | ||
38 | |||
39 | #define IO_SPACE_LIMIT 0xffffffff | ||
40 | |||
41 | /* | ||
42 | * We don't actually have real ISA nor PCI buses, but there is so many | ||
43 | * drivers out there that might just work if we fake them... | ||
44 | */ | ||
45 | #define __io(a) ((void __iomem *)(PCIO_BASE + (a))) | ||
46 | #define __mem_pci(a) (a) | ||
47 | |||
48 | /* | ||
49 | * ---------------------------------------------------------------------------- | ||
50 | * I/O mapping | ||
51 | * ---------------------------------------------------------------------------- | ||
52 | */ | ||
53 | |||
54 | #define PCIO_BASE 0 | ||
55 | |||
56 | #if defined(CONFIG_ARCH_OMAP1) | ||
57 | |||
58 | #define IO_PHYS 0xFFFB0000 | ||
59 | #define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ | ||
60 | #define IO_SIZE 0x40000 | ||
61 | #define IO_VIRT (IO_PHYS - IO_OFFSET) | ||
62 | #define IO_ADDRESS(pa) ((pa) - IO_OFFSET) | ||
63 | #define OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET) | ||
64 | #define io_p2v(pa) ((pa) - IO_OFFSET) | ||
65 | #define io_v2p(va) ((va) + IO_OFFSET) | ||
66 | |||
67 | #elif defined(CONFIG_ARCH_OMAP2) | ||
68 | |||
69 | /* We map both L3 and L4 on OMAP2 */ | ||
70 | #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 */ | ||
71 | #define L3_24XX_VIRT 0xf8000000 | ||
72 | #define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */ | ||
73 | #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 */ | ||
74 | #define L4_24XX_VIRT 0xd8000000 | ||
75 | #define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */ | ||
76 | |||
77 | #ifdef CONFIG_ARCH_OMAP2430 | ||
78 | #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 */ | ||
79 | #define L4_WK_243X_VIRT 0xd9000000 | ||
80 | #define L4_WK_243X_SIZE SZ_1M | ||
81 | #define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE /* 0x49000000 */ | ||
82 | #define OMAP243X_GPMC_VIRT 0xFE000000 | ||
83 | #define OMAP243X_GPMC_SIZE SZ_1M | ||
84 | #define OMAP243X_SDRC_PHYS OMAP243X_SDRC_BASE | ||
85 | #define OMAP243X_SDRC_VIRT 0xFD000000 | ||
86 | #define OMAP243X_SDRC_SIZE SZ_1M | ||
87 | #define OMAP243X_SMS_PHYS OMAP243X_SMS_BASE | ||
88 | #define OMAP243X_SMS_VIRT 0xFC000000 | ||
89 | #define OMAP243X_SMS_SIZE SZ_1M | ||
90 | |||
91 | #endif | ||
92 | |||
93 | #define IO_OFFSET 0x90000000 | ||
94 | #define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ | ||
95 | #define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ | ||
96 | #define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ | ||
97 | #define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */ | ||
98 | |||
99 | /* DSP */ | ||
100 | #define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ | ||
101 | #define DSP_MEM_24XX_VIRT 0xe0000000 | ||
102 | #define DSP_MEM_24XX_SIZE 0x28000 | ||
103 | #define DSP_IPI_24XX_PHYS OMAP2420_DSP_IPI_BASE /* 0x59000000 */ | ||
104 | #define DSP_IPI_24XX_VIRT 0xe1000000 | ||
105 | #define DSP_IPI_24XX_SIZE SZ_4K | ||
106 | #define DSP_MMU_24XX_PHYS OMAP2420_DSP_MMU_BASE /* 0x5a000000 */ | ||
107 | #define DSP_MMU_24XX_VIRT 0xe2000000 | ||
108 | #define DSP_MMU_24XX_SIZE SZ_4K | ||
109 | |||
110 | #elif defined(CONFIG_ARCH_OMAP3) | ||
111 | |||
112 | /* We map both L3 and L4 on OMAP3 */ | ||
113 | #define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 */ | ||
114 | #define L3_34XX_VIRT 0xf8000000 | ||
115 | #define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */ | ||
116 | |||
117 | #define L4_34XX_PHYS L4_34XX_BASE /* 0x48000000 */ | ||
118 | #define L4_34XX_VIRT 0xd8000000 | ||
119 | #define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */ | ||
120 | |||
121 | /* | ||
122 | * Need to look at the Size 4M for L4. | ||
123 | * VPOM3430 was not working for Int controller | ||
124 | */ | ||
125 | |||
126 | #define L4_WK_34XX_PHYS L4_WK_34XX_BASE /* 0x48300000 */ | ||
127 | #define L4_WK_34XX_VIRT 0xd8300000 | ||
128 | #define L4_WK_34XX_SIZE SZ_1M | ||
129 | |||
130 | #define L4_PER_34XX_PHYS L4_PER_34XX_BASE /* 0x49000000 */ | ||
131 | #define L4_PER_34XX_VIRT 0xd9000000 | ||
132 | #define L4_PER_34XX_SIZE SZ_1M | ||
133 | |||
134 | #define L4_EMU_34XX_PHYS L4_EMU_34XX_BASE /* 0x54000000 */ | ||
135 | #define L4_EMU_34XX_VIRT 0xe4000000 | ||
136 | #define L4_EMU_34XX_SIZE SZ_64M | ||
137 | |||
138 | #define OMAP34XX_GPMC_PHYS OMAP34XX_GPMC_BASE /* 0x6E000000 */ | ||
139 | #define OMAP34XX_GPMC_VIRT 0xFE000000 | ||
140 | #define OMAP34XX_GPMC_SIZE SZ_1M | ||
141 | |||
142 | #define OMAP343X_SMS_PHYS OMAP343X_SMS_BASE /* 0x6C000000 */ | ||
143 | #define OMAP343X_SMS_VIRT 0xFC000000 | ||
144 | #define OMAP343X_SMS_SIZE SZ_1M | ||
145 | |||
146 | #define OMAP343X_SDRC_PHYS OMAP343X_SDRC_BASE /* 0x6D000000 */ | ||
147 | #define OMAP343X_SDRC_VIRT 0xFD000000 | ||
148 | #define OMAP343X_SDRC_SIZE SZ_1M | ||
149 | |||
150 | |||
151 | #define IO_OFFSET 0x90000000 | ||
152 | #define IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ | ||
153 | #define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ | ||
154 | #define io_p2v(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ | ||
155 | #define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */ | ||
156 | |||
157 | /* DSP */ | ||
158 | #define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */ | ||
159 | #define DSP_MEM_34XX_VIRT 0xe0000000 | ||
160 | #define DSP_MEM_34XX_SIZE 0x28000 | ||
161 | #define DSP_IPI_34XX_PHYS OMAP34XX_DSP_IPI_BASE /* 0x59000000 */ | ||
162 | #define DSP_IPI_34XX_VIRT 0xe1000000 | ||
163 | #define DSP_IPI_34XX_SIZE SZ_4K | ||
164 | #define DSP_MMU_34XX_PHYS OMAP34XX_DSP_MMU_BASE /* 0x5a000000 */ | ||
165 | #define DSP_MMU_34XX_VIRT 0xe2000000 | ||
166 | #define DSP_MMU_34XX_SIZE SZ_4K | ||
167 | |||
168 | #endif | ||
169 | |||
170 | #ifndef __ASSEMBLER__ | ||
171 | |||
172 | /* | ||
173 | * Functions to access the OMAP IO region | ||
174 | * | ||
175 | * NOTE: - Use omap_read/write[bwl] for physical register addresses | ||
176 | * - Use __raw_read/write[bwl]() for virtual register addresses | ||
177 | * - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses | ||
178 | * - DO NOT use hardcoded virtual addresses to allow changing the | ||
179 | * IO address space again if needed | ||
180 | */ | ||
181 | #define omap_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a)) | ||
182 | #define omap_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a)) | ||
183 | #define omap_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a)) | ||
184 | |||
185 | #define omap_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v)) | ||
186 | #define omap_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v)) | ||
187 | #define omap_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v)) | ||
188 | |||
189 | extern void omap1_map_common_io(void); | ||
190 | extern void omap1_init_common_hw(void); | ||
191 | |||
192 | extern void omap2_map_common_io(void); | ||
193 | extern void omap2_init_common_hw(void); | ||
194 | |||
195 | #endif | ||
196 | |||
197 | #endif | ||