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authorJarkko Nikula <jarkko.nikula@nokia.com>2008-12-10 20:36:52 -0500
committerTony Lindgren <tony@atomide.com>2008-12-10 20:36:52 -0500
commitad636ad84e059e714013e009f76878b888de1f09 (patch)
treede59cb97777601f6011d35e3a2280cfc83987d73 /arch/arm/plat-omap/i2c.c
parent6ccc4c0dedf8cc63bf4f7c0cfa1b72c4a5fae148 (diff)
ARM: OMAP3: Add OMAP34xx pin multiplexing into I2C bus registration helper
- Simplify function omap_i2c_mux_pins - Add OMAP34xx pin multiplexing for busses 1 - 3 Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/i2c.c')
-rw-r--r--arch/arm/plat-omap/i2c.c55
1 files changed, 36 insertions, 19 deletions
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index 0e6d147ab6f8..89a6ab0b7db8 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -79,26 +79,43 @@ static struct platform_device omap_i2c_devices[] = {
79#endif 79#endif
80}; 80};
81 81
82static void __init omap_i2c_mux_pins(int bus_id) 82#if defined(CONFIG_ARCH_OMAP24XX)
83static const int omap24xx_pins[][2] = {
84 { M19_24XX_I2C1_SCL, L15_24XX_I2C1_SDA },
85 { J15_24XX_I2C2_SCL, H19_24XX_I2C2_SDA },
86};
87#else
88static const int omap24xx_pins[][2] = {};
89#endif
90#if defined(CONFIG_ARCH_OMAP34XX)
91static const int omap34xx_pins[][2] = {
92 { K21_34XX_I2C1_SCL, J21_34XX_I2C1_SDA},
93 { AF15_34XX_I2C2_SCL, AE15_34XX_I2C2_SDA},
94 { AF14_34XX_I2C3_SCL, AG14_34XX_I2C3_SDA},
95};
96#else
97static const int omap34xx_pins[][2] = {};
98#endif
99
100static void __init omap_i2c_mux_pins(int bus)
83{ 101{
84 /* TODO: Muxing for OMAP3 */ 102 int scl, sda;
85 switch (bus_id) { 103
86 case 1: 104 if (cpu_class_is_omap1()) {
87 if (cpu_class_is_omap1()) { 105 scl = I2C_SCL;
88 omap_cfg_reg(I2C_SCL); 106 sda = I2C_SDA;
89 omap_cfg_reg(I2C_SDA); 107 } else if (cpu_is_omap24xx()) {
90 } else if (cpu_is_omap24xx()) { 108 scl = omap24xx_pins[bus][0];
91 omap_cfg_reg(M19_24XX_I2C1_SCL); 109 sda = omap24xx_pins[bus][1];
92 omap_cfg_reg(L15_24XX_I2C1_SDA); 110 } else if (cpu_is_omap34xx()) {
93 } 111 scl = omap34xx_pins[bus][0];
94 break; 112 sda = omap34xx_pins[bus][1];
95 case 2: 113 } else {
96 if (cpu_is_omap24xx()) { 114 return;
97 omap_cfg_reg(J15_24XX_I2C2_SCL);
98 omap_cfg_reg(H19_24XX_I2C2_SDA);
99 }
100 break;
101 } 115 }
116
117 omap_cfg_reg(sda);
118 omap_cfg_reg(scl);
102} 119}
103 120
104int __init omap_register_i2c_bus(int bus_id, u32 clkrate, 121int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
@@ -142,6 +159,6 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
142 res[1].start = irq; 159 res[1].start = irq;
143 } 160 }
144 161
145 omap_i2c_mux_pins(bus_id); 162 omap_i2c_mux_pins(bus_id - 1);
146 return platform_device_register(pdev); 163 return platform_device_register(pdev);
147} 164}