diff options
author | David Brownell <dbrownell@users.sourceforge.net> | 2006-12-06 20:13:59 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-05-05 05:56:28 -0400 |
commit | e5c56ed3c9caa6ba717af0a5c23e2c7bf5c97a1f (patch) | |
tree | e57e4e39bc7b9426b58a2cb16790df9608d14c38 /arch/arm/plat-omap/gpio.c | |
parent | b9772a220a0d1b1d83b770ed131fa8b090af3681 (diff) |
ARM: OMAP: gpio object shrinkage, cleanup
More GPIO/IRQ cleanup:
- compile-time removal of much useless code
* mpuio support on non-OMAP1.
* 15xx/730/24xx gpio support on 1610
* 15xx/730/16xx gpio support on 24xx
* etc
- remove all BUG() calls, which are always bad news ... replaced some
with normal fault reports for that call, others with WARN_ON(1).
- small mpuio bugfix: add missing set_type() method
Oh, and fix a minor merge issue: inode->u.generic_ip is now gone.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-omap/gpio.c')
-rw-r--r-- | arch/arm/plat-omap/gpio.c | 166 |
1 files changed, 130 insertions, 36 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 0059f19185a7..f0a882b8ab3a 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -267,21 +267,34 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) | |||
267 | u32 l; | 267 | u32 l; |
268 | 268 | ||
269 | switch (bank->method) { | 269 | switch (bank->method) { |
270 | #ifdef CONFIG_ARCH_OMAP1 | ||
270 | case METHOD_MPUIO: | 271 | case METHOD_MPUIO: |
271 | reg += OMAP_MPUIO_IO_CNTL; | 272 | reg += OMAP_MPUIO_IO_CNTL; |
272 | break; | 273 | break; |
274 | #endif | ||
275 | #ifdef CONFIG_ARCH_OMAP15XX | ||
273 | case METHOD_GPIO_1510: | 276 | case METHOD_GPIO_1510: |
274 | reg += OMAP1510_GPIO_DIR_CONTROL; | 277 | reg += OMAP1510_GPIO_DIR_CONTROL; |
275 | break; | 278 | break; |
279 | #endif | ||
280 | #ifdef CONFIG_ARCH_OMAP16XX | ||
276 | case METHOD_GPIO_1610: | 281 | case METHOD_GPIO_1610: |
277 | reg += OMAP1610_GPIO_DIRECTION; | 282 | reg += OMAP1610_GPIO_DIRECTION; |
278 | break; | 283 | break; |
284 | #endif | ||
285 | #ifdef CONFIG_ARCH_OMAP730 | ||
279 | case METHOD_GPIO_730: | 286 | case METHOD_GPIO_730: |
280 | reg += OMAP730_GPIO_DIR_CONTROL; | 287 | reg += OMAP730_GPIO_DIR_CONTROL; |
281 | break; | 288 | break; |
289 | #endif | ||
290 | #ifdef CONFIG_ARCH_OMAP24XX | ||
282 | case METHOD_GPIO_24XX: | 291 | case METHOD_GPIO_24XX: |
283 | reg += OMAP24XX_GPIO_OE; | 292 | reg += OMAP24XX_GPIO_OE; |
284 | break; | 293 | break; |
294 | #endif | ||
295 | default: | ||
296 | WARN_ON(1); | ||
297 | return; | ||
285 | } | 298 | } |
286 | l = __raw_readl(reg); | 299 | l = __raw_readl(reg); |
287 | if (is_input) | 300 | if (is_input) |
@@ -309,6 +322,7 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
309 | u32 l = 0; | 322 | u32 l = 0; |
310 | 323 | ||
311 | switch (bank->method) { | 324 | switch (bank->method) { |
325 | #ifdef CONFIG_ARCH_OMAP1 | ||
312 | case METHOD_MPUIO: | 326 | case METHOD_MPUIO: |
313 | reg += OMAP_MPUIO_OUTPUT; | 327 | reg += OMAP_MPUIO_OUTPUT; |
314 | l = __raw_readl(reg); | 328 | l = __raw_readl(reg); |
@@ -317,6 +331,8 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
317 | else | 331 | else |
318 | l &= ~(1 << gpio); | 332 | l &= ~(1 << gpio); |
319 | break; | 333 | break; |
334 | #endif | ||
335 | #ifdef CONFIG_ARCH_OMAP15XX | ||
320 | case METHOD_GPIO_1510: | 336 | case METHOD_GPIO_1510: |
321 | reg += OMAP1510_GPIO_DATA_OUTPUT; | 337 | reg += OMAP1510_GPIO_DATA_OUTPUT; |
322 | l = __raw_readl(reg); | 338 | l = __raw_readl(reg); |
@@ -325,6 +341,8 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
325 | else | 341 | else |
326 | l &= ~(1 << gpio); | 342 | l &= ~(1 << gpio); |
327 | break; | 343 | break; |
344 | #endif | ||
345 | #ifdef CONFIG_ARCH_OMAP16XX | ||
328 | case METHOD_GPIO_1610: | 346 | case METHOD_GPIO_1610: |
329 | if (enable) | 347 | if (enable) |
330 | reg += OMAP1610_GPIO_SET_DATAOUT; | 348 | reg += OMAP1610_GPIO_SET_DATAOUT; |
@@ -332,6 +350,8 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
332 | reg += OMAP1610_GPIO_CLEAR_DATAOUT; | 350 | reg += OMAP1610_GPIO_CLEAR_DATAOUT; |
333 | l = 1 << gpio; | 351 | l = 1 << gpio; |
334 | break; | 352 | break; |
353 | #endif | ||
354 | #ifdef CONFIG_ARCH_OMAP730 | ||
335 | case METHOD_GPIO_730: | 355 | case METHOD_GPIO_730: |
336 | reg += OMAP730_GPIO_DATA_OUTPUT; | 356 | reg += OMAP730_GPIO_DATA_OUTPUT; |
337 | l = __raw_readl(reg); | 357 | l = __raw_readl(reg); |
@@ -340,6 +360,8 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
340 | else | 360 | else |
341 | l &= ~(1 << gpio); | 361 | l &= ~(1 << gpio); |
342 | break; | 362 | break; |
363 | #endif | ||
364 | #ifdef CONFIG_ARCH_OMAP24XX | ||
343 | case METHOD_GPIO_24XX: | 365 | case METHOD_GPIO_24XX: |
344 | if (enable) | 366 | if (enable) |
345 | reg += OMAP24XX_GPIO_SETDATAOUT; | 367 | reg += OMAP24XX_GPIO_SETDATAOUT; |
@@ -347,8 +369,9 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
347 | reg += OMAP24XX_GPIO_CLEARDATAOUT; | 369 | reg += OMAP24XX_GPIO_CLEARDATAOUT; |
348 | l = 1 << gpio; | 370 | l = 1 << gpio; |
349 | break; | 371 | break; |
372 | #endif | ||
350 | default: | 373 | default: |
351 | BUG(); | 374 | WARN_ON(1); |
352 | return; | 375 | return; |
353 | } | 376 | } |
354 | __raw_writel(l, reg); | 377 | __raw_writel(l, reg); |
@@ -372,28 +395,37 @@ int omap_get_gpio_datain(int gpio) | |||
372 | void __iomem *reg; | 395 | void __iomem *reg; |
373 | 396 | ||
374 | if (check_gpio(gpio) < 0) | 397 | if (check_gpio(gpio) < 0) |
375 | return -1; | 398 | return -EINVAL; |
376 | bank = get_gpio_bank(gpio); | 399 | bank = get_gpio_bank(gpio); |
377 | reg = bank->base; | 400 | reg = bank->base; |
378 | switch (bank->method) { | 401 | switch (bank->method) { |
402 | #ifdef CONFIG_ARCH_OMAP1 | ||
379 | case METHOD_MPUIO: | 403 | case METHOD_MPUIO: |
380 | reg += OMAP_MPUIO_INPUT_LATCH; | 404 | reg += OMAP_MPUIO_INPUT_LATCH; |
381 | break; | 405 | break; |
406 | #endif | ||
407 | #ifdef CONFIG_ARCH_OMAP15XX | ||
382 | case METHOD_GPIO_1510: | 408 | case METHOD_GPIO_1510: |
383 | reg += OMAP1510_GPIO_DATA_INPUT; | 409 | reg += OMAP1510_GPIO_DATA_INPUT; |
384 | break; | 410 | break; |
411 | #endif | ||
412 | #ifdef CONFIG_ARCH_OMAP16XX | ||
385 | case METHOD_GPIO_1610: | 413 | case METHOD_GPIO_1610: |
386 | reg += OMAP1610_GPIO_DATAIN; | 414 | reg += OMAP1610_GPIO_DATAIN; |
387 | break; | 415 | break; |
416 | #endif | ||
417 | #ifdef CONFIG_ARCH_OMAP730 | ||
388 | case METHOD_GPIO_730: | 418 | case METHOD_GPIO_730: |
389 | reg += OMAP730_GPIO_DATA_INPUT; | 419 | reg += OMAP730_GPIO_DATA_INPUT; |
390 | break; | 420 | break; |
421 | #endif | ||
422 | #ifdef CONFIG_ARCH_OMAP24XX | ||
391 | case METHOD_GPIO_24XX: | 423 | case METHOD_GPIO_24XX: |
392 | reg += OMAP24XX_GPIO_DATAIN; | 424 | reg += OMAP24XX_GPIO_DATAIN; |
393 | break; | 425 | break; |
426 | #endif | ||
394 | default: | 427 | default: |
395 | BUG(); | 428 | return -EINVAL; |
396 | return -1; | ||
397 | } | 429 | } |
398 | return (__raw_readl(reg) | 430 | return (__raw_readl(reg) |
399 | & (1 << get_gpio_index(gpio))) != 0; | 431 | & (1 << get_gpio_index(gpio))) != 0; |
@@ -443,6 +475,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
443 | u32 l = 0; | 475 | u32 l = 0; |
444 | 476 | ||
445 | switch (bank->method) { | 477 | switch (bank->method) { |
478 | #ifdef CONFIG_ARCH_OMAP1 | ||
446 | case METHOD_MPUIO: | 479 | case METHOD_MPUIO: |
447 | reg += OMAP_MPUIO_GPIO_INT_EDGE; | 480 | reg += OMAP_MPUIO_GPIO_INT_EDGE; |
448 | l = __raw_readl(reg); | 481 | l = __raw_readl(reg); |
@@ -453,6 +486,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
453 | else | 486 | else |
454 | goto bad; | 487 | goto bad; |
455 | break; | 488 | break; |
489 | #endif | ||
490 | #ifdef CONFIG_ARCH_OMAP15XX | ||
456 | case METHOD_GPIO_1510: | 491 | case METHOD_GPIO_1510: |
457 | reg += OMAP1510_GPIO_INT_CONTROL; | 492 | reg += OMAP1510_GPIO_INT_CONTROL; |
458 | l = __raw_readl(reg); | 493 | l = __raw_readl(reg); |
@@ -463,6 +498,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
463 | else | 498 | else |
464 | goto bad; | 499 | goto bad; |
465 | break; | 500 | break; |
501 | #endif | ||
466 | #ifdef CONFIG_ARCH_OMAP16XX | 502 | #ifdef CONFIG_ARCH_OMAP16XX |
467 | case METHOD_GPIO_1610: | 503 | case METHOD_GPIO_1610: |
468 | if (gpio & 0x08) | 504 | if (gpio & 0x08) |
@@ -470,9 +506,6 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
470 | else | 506 | else |
471 | reg += OMAP1610_GPIO_EDGE_CTRL1; | 507 | reg += OMAP1610_GPIO_EDGE_CTRL1; |
472 | gpio &= 0x07; | 508 | gpio &= 0x07; |
473 | /* We allow only edge triggering, i.e. two lowest bits */ | ||
474 | if (trigger & (__IRQT_LOWLVL | __IRQT_HIGHLVL)) | ||
475 | BUG(); | ||
476 | l = __raw_readl(reg); | 509 | l = __raw_readl(reg); |
477 | l &= ~(3 << (gpio << 1)); | 510 | l &= ~(3 << (gpio << 1)); |
478 | if (trigger & __IRQT_RISEDGE) | 511 | if (trigger & __IRQT_RISEDGE) |
@@ -504,7 +537,6 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
504 | break; | 537 | break; |
505 | #endif | 538 | #endif |
506 | default: | 539 | default: |
507 | BUG(); | ||
508 | goto bad; | 540 | goto bad; |
509 | } | 541 | } |
510 | __raw_writel(l, reg); | 542 | __raw_writel(l, reg); |
@@ -519,7 +551,7 @@ static int gpio_irq_type(unsigned irq, unsigned type) | |||
519 | unsigned gpio; | 551 | unsigned gpio; |
520 | int retval; | 552 | int retval; |
521 | 553 | ||
522 | if (irq > IH_MPUIO_BASE) | 554 | if (!cpu_is_omap24xx() && irq > IH_MPUIO_BASE) |
523 | gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); | 555 | gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); |
524 | else | 556 | else |
525 | gpio = irq - IH_GPIO_BASE; | 557 | gpio = irq - IH_GPIO_BASE; |
@@ -527,9 +559,12 @@ static int gpio_irq_type(unsigned irq, unsigned type) | |||
527 | if (check_gpio(gpio) < 0) | 559 | if (check_gpio(gpio) < 0) |
528 | return -EINVAL; | 560 | return -EINVAL; |
529 | 561 | ||
530 | if (type & IRQT_PROBE) | 562 | if (type & ~IRQ_TYPE_SENSE_MASK) |
531 | return -EINVAL; | 563 | return -EINVAL; |
532 | if (!cpu_is_omap24xx() && (type & (__IRQT_LOWLVL|__IRQT_HIGHLVL))) | 564 | |
565 | /* OMAP1 allows only only edge triggering */ | ||
566 | if (!cpu_is_omap24xx() | ||
567 | && (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) | ||
533 | return -EINVAL; | 568 | return -EINVAL; |
534 | 569 | ||
535 | bank = get_gpio_bank(gpio); | 570 | bank = get_gpio_bank(gpio); |
@@ -548,24 +583,34 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) | |||
548 | void __iomem *reg = bank->base; | 583 | void __iomem *reg = bank->base; |
549 | 584 | ||
550 | switch (bank->method) { | 585 | switch (bank->method) { |
586 | #ifdef CONFIG_ARCH_OMAP1 | ||
551 | case METHOD_MPUIO: | 587 | case METHOD_MPUIO: |
552 | /* MPUIO irqstatus is reset by reading the status register, | 588 | /* MPUIO irqstatus is reset by reading the status register, |
553 | * so do nothing here */ | 589 | * so do nothing here */ |
554 | return; | 590 | return; |
591 | #endif | ||
592 | #ifdef CONFIG_ARCH_OMAP15XX | ||
555 | case METHOD_GPIO_1510: | 593 | case METHOD_GPIO_1510: |
556 | reg += OMAP1510_GPIO_INT_STATUS; | 594 | reg += OMAP1510_GPIO_INT_STATUS; |
557 | break; | 595 | break; |
596 | #endif | ||
597 | #ifdef CONFIG_ARCH_OMAP16XX | ||
558 | case METHOD_GPIO_1610: | 598 | case METHOD_GPIO_1610: |
559 | reg += OMAP1610_GPIO_IRQSTATUS1; | 599 | reg += OMAP1610_GPIO_IRQSTATUS1; |
560 | break; | 600 | break; |
601 | #endif | ||
602 | #ifdef CONFIG_ARCH_OMAP730 | ||
561 | case METHOD_GPIO_730: | 603 | case METHOD_GPIO_730: |
562 | reg += OMAP730_GPIO_INT_STATUS; | 604 | reg += OMAP730_GPIO_INT_STATUS; |
563 | break; | 605 | break; |
606 | #endif | ||
607 | #ifdef CONFIG_ARCH_OMAP24XX | ||
564 | case METHOD_GPIO_24XX: | 608 | case METHOD_GPIO_24XX: |
565 | reg += OMAP24XX_GPIO_IRQSTATUS1; | 609 | reg += OMAP24XX_GPIO_IRQSTATUS1; |
566 | break; | 610 | break; |
611 | #endif | ||
567 | default: | 612 | default: |
568 | BUG(); | 613 | WARN_ON(1); |
569 | return; | 614 | return; |
570 | } | 615 | } |
571 | __raw_writel(gpio_mask, reg); | 616 | __raw_writel(gpio_mask, reg); |
@@ -588,31 +633,41 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank) | |||
588 | u32 mask; | 633 | u32 mask; |
589 | 634 | ||
590 | switch (bank->method) { | 635 | switch (bank->method) { |
636 | #ifdef CONFIG_ARCH_OMAP1 | ||
591 | case METHOD_MPUIO: | 637 | case METHOD_MPUIO: |
592 | reg += OMAP_MPUIO_GPIO_MASKIT; | 638 | reg += OMAP_MPUIO_GPIO_MASKIT; |
593 | mask = 0xffff; | 639 | mask = 0xffff; |
594 | inv = 1; | 640 | inv = 1; |
595 | break; | 641 | break; |
642 | #endif | ||
643 | #ifdef CONFIG_ARCH_OMAP15XX | ||
596 | case METHOD_GPIO_1510: | 644 | case METHOD_GPIO_1510: |
597 | reg += OMAP1510_GPIO_INT_MASK; | 645 | reg += OMAP1510_GPIO_INT_MASK; |
598 | mask = 0xffff; | 646 | mask = 0xffff; |
599 | inv = 1; | 647 | inv = 1; |
600 | break; | 648 | break; |
649 | #endif | ||
650 | #ifdef CONFIG_ARCH_OMAP16XX | ||
601 | case METHOD_GPIO_1610: | 651 | case METHOD_GPIO_1610: |
602 | reg += OMAP1610_GPIO_IRQENABLE1; | 652 | reg += OMAP1610_GPIO_IRQENABLE1; |
603 | mask = 0xffff; | 653 | mask = 0xffff; |
604 | break; | 654 | break; |
655 | #endif | ||
656 | #ifdef CONFIG_ARCH_OMAP730 | ||
605 | case METHOD_GPIO_730: | 657 | case METHOD_GPIO_730: |
606 | reg += OMAP730_GPIO_INT_MASK; | 658 | reg += OMAP730_GPIO_INT_MASK; |
607 | mask = 0xffffffff; | 659 | mask = 0xffffffff; |
608 | inv = 1; | 660 | inv = 1; |
609 | break; | 661 | break; |
662 | #endif | ||
663 | #ifdef CONFIG_ARCH_OMAP24XX | ||
610 | case METHOD_GPIO_24XX: | 664 | case METHOD_GPIO_24XX: |
611 | reg += OMAP24XX_GPIO_IRQENABLE1; | 665 | reg += OMAP24XX_GPIO_IRQENABLE1; |
612 | mask = 0xffffffff; | 666 | mask = 0xffffffff; |
613 | break; | 667 | break; |
668 | #endif | ||
614 | default: | 669 | default: |
615 | BUG(); | 670 | WARN_ON(1); |
616 | return 0; | 671 | return 0; |
617 | } | 672 | } |
618 | 673 | ||
@@ -629,6 +684,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
629 | u32 l; | 684 | u32 l; |
630 | 685 | ||
631 | switch (bank->method) { | 686 | switch (bank->method) { |
687 | #ifdef CONFIG_ARCH_OMAP1 | ||
632 | case METHOD_MPUIO: | 688 | case METHOD_MPUIO: |
633 | reg += OMAP_MPUIO_GPIO_MASKIT; | 689 | reg += OMAP_MPUIO_GPIO_MASKIT; |
634 | l = __raw_readl(reg); | 690 | l = __raw_readl(reg); |
@@ -637,6 +693,8 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
637 | else | 693 | else |
638 | l |= gpio_mask; | 694 | l |= gpio_mask; |
639 | break; | 695 | break; |
696 | #endif | ||
697 | #ifdef CONFIG_ARCH_OMAP15XX | ||
640 | case METHOD_GPIO_1510: | 698 | case METHOD_GPIO_1510: |
641 | reg += OMAP1510_GPIO_INT_MASK; | 699 | reg += OMAP1510_GPIO_INT_MASK; |
642 | l = __raw_readl(reg); | 700 | l = __raw_readl(reg); |
@@ -645,6 +703,8 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
645 | else | 703 | else |
646 | l |= gpio_mask; | 704 | l |= gpio_mask; |
647 | break; | 705 | break; |
706 | #endif | ||
707 | #ifdef CONFIG_ARCH_OMAP16XX | ||
648 | case METHOD_GPIO_1610: | 708 | case METHOD_GPIO_1610: |
649 | if (enable) | 709 | if (enable) |
650 | reg += OMAP1610_GPIO_SET_IRQENABLE1; | 710 | reg += OMAP1610_GPIO_SET_IRQENABLE1; |
@@ -652,6 +712,8 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
652 | reg += OMAP1610_GPIO_CLEAR_IRQENABLE1; | 712 | reg += OMAP1610_GPIO_CLEAR_IRQENABLE1; |
653 | l = gpio_mask; | 713 | l = gpio_mask; |
654 | break; | 714 | break; |
715 | #endif | ||
716 | #ifdef CONFIG_ARCH_OMAP730 | ||
655 | case METHOD_GPIO_730: | 717 | case METHOD_GPIO_730: |
656 | reg += OMAP730_GPIO_INT_MASK; | 718 | reg += OMAP730_GPIO_INT_MASK; |
657 | l = __raw_readl(reg); | 719 | l = __raw_readl(reg); |
@@ -660,6 +722,8 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
660 | else | 722 | else |
661 | l |= gpio_mask; | 723 | l |= gpio_mask; |
662 | break; | 724 | break; |
725 | #endif | ||
726 | #ifdef CONFIG_ARCH_OMAP24XX | ||
663 | case METHOD_GPIO_24XX: | 727 | case METHOD_GPIO_24XX: |
664 | if (enable) | 728 | if (enable) |
665 | reg += OMAP24XX_GPIO_SETIRQENABLE1; | 729 | reg += OMAP24XX_GPIO_SETIRQENABLE1; |
@@ -667,8 +731,9 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
667 | reg += OMAP24XX_GPIO_CLEARIRQENABLE1; | 731 | reg += OMAP24XX_GPIO_CLEARIRQENABLE1; |
668 | l = gpio_mask; | 732 | l = gpio_mask; |
669 | break; | 733 | break; |
734 | #endif | ||
670 | default: | 735 | default: |
671 | BUG(); | 736 | WARN_ON(1); |
672 | return; | 737 | return; |
673 | } | 738 | } |
674 | __raw_writel(l, reg); | 739 | __raw_writel(l, reg); |
@@ -837,8 +902,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
837 | desc->chip->ack(irq); | 902 | desc->chip->ack(irq); |
838 | 903 | ||
839 | bank = get_irq_data(irq); | 904 | bank = get_irq_data(irq); |
905 | #ifdef CONFIG_ARCH_OMAP1 | ||
840 | if (bank->method == METHOD_MPUIO) | 906 | if (bank->method == METHOD_MPUIO) |
841 | isr_reg = bank->base + OMAP_MPUIO_GPIO_INT; | 907 | isr_reg = bank->base + OMAP_MPUIO_GPIO_INT; |
908 | #endif | ||
842 | #ifdef CONFIG_ARCH_OMAP15XX | 909 | #ifdef CONFIG_ARCH_OMAP15XX |
843 | if (bank->method == METHOD_GPIO_1510) | 910 | if (bank->method == METHOD_GPIO_1510) |
844 | isr_reg = bank->base + OMAP1510_GPIO_INT_STATUS; | 911 | isr_reg = bank->base + OMAP1510_GPIO_INT_STATUS; |
@@ -984,6 +1051,22 @@ static void gpio_unmask_irq(unsigned int irq) | |||
984 | _set_gpio_irqenable(bank, gpio_idx, 1); | 1051 | _set_gpio_irqenable(bank, gpio_idx, 1); |
985 | } | 1052 | } |
986 | 1053 | ||
1054 | static struct irq_chip gpio_irq_chip = { | ||
1055 | .name = "GPIO", | ||
1056 | .shutdown = gpio_irq_shutdown, | ||
1057 | .ack = gpio_ack_irq, | ||
1058 | .mask = gpio_mask_irq, | ||
1059 | .unmask = gpio_unmask_irq, | ||
1060 | .set_type = gpio_irq_type, | ||
1061 | .set_wake = gpio_wake_enable, | ||
1062 | }; | ||
1063 | |||
1064 | /*---------------------------------------------------------------------*/ | ||
1065 | |||
1066 | #ifdef CONFIG_ARCH_OMAP1 | ||
1067 | |||
1068 | /* MPUIO uses the always-on 32k clock */ | ||
1069 | |||
987 | static void mpuio_ack_irq(unsigned int irq) | 1070 | static void mpuio_ack_irq(unsigned int irq) |
988 | { | 1071 | { |
989 | /* The ISR is reset automatically, so do nothing here. */ | 1072 | /* The ISR is reset automatically, so do nothing here. */ |
@@ -1005,23 +1088,26 @@ static void mpuio_unmask_irq(unsigned int irq) | |||
1005 | _set_gpio_irqenable(bank, gpio, 1); | 1088 | _set_gpio_irqenable(bank, gpio, 1); |
1006 | } | 1089 | } |
1007 | 1090 | ||
1008 | static struct irq_chip gpio_irq_chip = { | 1091 | static struct irq_chip mpuio_irq_chip = { |
1009 | .name = "GPIO", | 1092 | .name = "MPUIO", |
1010 | .shutdown = gpio_irq_shutdown, | 1093 | .ack = mpuio_ack_irq, |
1011 | .ack = gpio_ack_irq, | 1094 | .mask = mpuio_mask_irq, |
1012 | .mask = gpio_mask_irq, | 1095 | .unmask = mpuio_unmask_irq, |
1013 | .unmask = gpio_unmask_irq, | ||
1014 | .set_type = gpio_irq_type, | 1096 | .set_type = gpio_irq_type, |
1015 | .set_wake = gpio_wake_enable, | ||
1016 | }; | 1097 | }; |
1017 | 1098 | ||
1018 | static struct irq_chip mpuio_irq_chip = { | 1099 | |
1019 | .name = "MPUIO", | 1100 | #define bank_is_mpuio(bank) ((bank)->method == METHOD_MPUIO) |
1020 | .ack = mpuio_ack_irq, | 1101 | |
1021 | .mask = mpuio_mask_irq, | 1102 | #else |
1022 | .unmask = mpuio_unmask_irq, | 1103 | |
1023 | .set_type = gpio_irq_type, | 1104 | extern struct irq_chip mpuio_irq_chip; |
1024 | }; | 1105 | |
1106 | #define bank_is_mpuio(bank) 0 | ||
1107 | |||
1108 | #endif | ||
1109 | |||
1110 | /*---------------------------------------------------------------------*/ | ||
1025 | 1111 | ||
1026 | static int initialized; | 1112 | static int initialized; |
1027 | static struct clk * gpio_ick; | 1113 | static struct clk * gpio_ick; |
@@ -1097,9 +1183,8 @@ static int __init _omap_gpio_init(void) | |||
1097 | bank->reserved_map = 0; | 1183 | bank->reserved_map = 0; |
1098 | bank->base = IO_ADDRESS(bank->base); | 1184 | bank->base = IO_ADDRESS(bank->base); |
1099 | spin_lock_init(&bank->lock); | 1185 | spin_lock_init(&bank->lock); |
1100 | if (bank->method == METHOD_MPUIO) { | 1186 | if (bank_is_mpuio(bank)) |
1101 | omap_writew(0xFFFF, OMAP_MPUIO_BASE + OMAP_MPUIO_GPIO_MASKIT); | 1187 | omap_writew(0xFFFF, OMAP_MPUIO_BASE + OMAP_MPUIO_GPIO_MASKIT); |
1102 | } | ||
1103 | #ifdef CONFIG_ARCH_OMAP15XX | 1188 | #ifdef CONFIG_ARCH_OMAP15XX |
1104 | if (bank->method == METHOD_GPIO_1510) { | 1189 | if (bank->method == METHOD_GPIO_1510) { |
1105 | __raw_writew(0xffff, bank->base + OMAP1510_GPIO_INT_MASK); | 1190 | __raw_writew(0xffff, bank->base + OMAP1510_GPIO_INT_MASK); |
@@ -1140,7 +1225,7 @@ static int __init _omap_gpio_init(void) | |||
1140 | #endif | 1225 | #endif |
1141 | for (j = bank->virtual_irq_start; | 1226 | for (j = bank->virtual_irq_start; |
1142 | j < bank->virtual_irq_start + gpio_count; j++) { | 1227 | j < bank->virtual_irq_start + gpio_count; j++) { |
1143 | if (bank->method == METHOD_MPUIO) | 1228 | if (bank_is_mpuio(bank)) |
1144 | set_irq_chip(j, &mpuio_irq_chip); | 1229 | set_irq_chip(j, &mpuio_irq_chip); |
1145 | else | 1230 | else |
1146 | set_irq_chip(j, &gpio_irq_chip); | 1231 | set_irq_chip(j, &gpio_irq_chip); |
@@ -1180,16 +1265,20 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) | |||
1180 | void __iomem *wake_set; | 1265 | void __iomem *wake_set; |
1181 | 1266 | ||
1182 | switch (bank->method) { | 1267 | switch (bank->method) { |
1268 | #ifdef CONFIG_ARCH_OMAP16XX | ||
1183 | case METHOD_GPIO_1610: | 1269 | case METHOD_GPIO_1610: |
1184 | wake_status = bank->base + OMAP1610_GPIO_WAKEUPENABLE; | 1270 | wake_status = bank->base + OMAP1610_GPIO_WAKEUPENABLE; |
1185 | wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA; | 1271 | wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA; |
1186 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; | 1272 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; |
1187 | break; | 1273 | break; |
1274 | #endif | ||
1275 | #ifdef CONFIG_ARCH_OMAP24XX | ||
1188 | case METHOD_GPIO_24XX: | 1276 | case METHOD_GPIO_24XX: |
1189 | wake_status = bank->base + OMAP24XX_GPIO_SETWKUENA; | 1277 | wake_status = bank->base + OMAP24XX_GPIO_SETWKUENA; |
1190 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; | 1278 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; |
1191 | wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; | 1279 | wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; |
1192 | break; | 1280 | break; |
1281 | #endif | ||
1193 | default: | 1282 | default: |
1194 | continue; | 1283 | continue; |
1195 | } | 1284 | } |
@@ -1217,14 +1306,18 @@ static int omap_gpio_resume(struct sys_device *dev) | |||
1217 | void __iomem *wake_set; | 1306 | void __iomem *wake_set; |
1218 | 1307 | ||
1219 | switch (bank->method) { | 1308 | switch (bank->method) { |
1309 | #ifdef CONFIG_ARCH_OMAP16XX | ||
1220 | case METHOD_GPIO_1610: | 1310 | case METHOD_GPIO_1610: |
1221 | wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA; | 1311 | wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA; |
1222 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; | 1312 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; |
1223 | break; | 1313 | break; |
1314 | #endif | ||
1315 | #ifdef CONFIG_ARCH_OMAP24XX | ||
1224 | case METHOD_GPIO_24XX: | 1316 | case METHOD_GPIO_24XX: |
1225 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; | 1317 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; |
1226 | wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; | 1318 | wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; |
1227 | break; | 1319 | break; |
1320 | #endif | ||
1228 | default: | 1321 | default: |
1229 | continue; | 1322 | continue; |
1230 | } | 1323 | } |
@@ -1404,7 +1497,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused) | |||
1404 | unsigned bankwidth = 16; | 1497 | unsigned bankwidth = 16; |
1405 | u32 mask = 1; | 1498 | u32 mask = 1; |
1406 | 1499 | ||
1407 | if (!cpu_is_omap24xx() && bank->method == METHOD_MPUIO) | 1500 | if (bank_is_mpuio(bank)) |
1408 | gpio = OMAP_MPUIO(0); | 1501 | gpio = OMAP_MPUIO(0); |
1409 | else if (cpu_is_omap24xx() || cpu_is_omap730()) | 1502 | else if (cpu_is_omap24xx() || cpu_is_omap730()) |
1410 | bankwidth = 32; | 1503 | bankwidth = 32; |
@@ -1419,7 +1512,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused) | |||
1419 | value = omap_get_gpio_datain(gpio); | 1512 | value = omap_get_gpio_datain(gpio); |
1420 | is_in = gpio_is_input(bank, mask); | 1513 | is_in = gpio_is_input(bank, mask); |
1421 | 1514 | ||
1422 | if (!cpu_is_omap24xx() && bank->method == METHOD_MPUIO) | 1515 | if (bank_is_mpuio(bank)) |
1423 | seq_printf(s, "MPUIO %2d: ", j); | 1516 | seq_printf(s, "MPUIO %2d: ", j); |
1424 | else | 1517 | else |
1425 | seq_printf(s, "GPIO %3d: ", gpio); | 1518 | seq_printf(s, "GPIO %3d: ", gpio); |
@@ -1460,7 +1553,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused) | |||
1460 | seq_printf(s, "\n"); | 1553 | seq_printf(s, "\n"); |
1461 | } | 1554 | } |
1462 | 1555 | ||
1463 | if (!cpu_is_omap24xx() && bank->method == METHOD_MPUIO) { | 1556 | if (bank_is_mpuio(bank)) { |
1464 | seq_printf(s, "\n"); | 1557 | seq_printf(s, "\n"); |
1465 | gpio = 0; | 1558 | gpio = 0; |
1466 | } | 1559 | } |
@@ -1470,7 +1563,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused) | |||
1470 | 1563 | ||
1471 | static int dbg_gpio_open(struct inode *inode, struct file *file) | 1564 | static int dbg_gpio_open(struct inode *inode, struct file *file) |
1472 | { | 1565 | { |
1473 | return single_open(file, dbg_gpio_show, inode->u.generic_ip/*i_private*/); | 1566 | return single_open(file, dbg_gpio_show, &inode->i_private); |
1474 | } | 1567 | } |
1475 | 1568 | ||
1476 | static const struct file_operations debug_fops = { | 1569 | static const struct file_operations debug_fops = { |
@@ -1482,7 +1575,8 @@ static const struct file_operations debug_fops = { | |||
1482 | 1575 | ||
1483 | static int __init omap_gpio_debuginit(void) | 1576 | static int __init omap_gpio_debuginit(void) |
1484 | { | 1577 | { |
1485 | (void) debugfs_create_file("omap_gpio", S_IRUGO, NULL, NULL, &debug_fops); | 1578 | (void) debugfs_create_file("omap_gpio", S_IRUGO, |
1579 | NULL, NULL, &debug_fops); | ||
1486 | return 0; | 1580 | return 0; |
1487 | } | 1581 | } |
1488 | late_initcall(omap_gpio_debuginit); | 1582 | late_initcall(omap_gpio_debuginit); |