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authorTony Lindgren <tony@atomide.com>2010-02-15 12:27:25 -0500
committerTony Lindgren <tony@atomide.com>2010-02-15 12:27:25 -0500
commit3f1686a9bfe74979c6ad538c78039730f665f77e (patch)
tree4220c1c16d3db8906fb66643db3ddc769a0e95b0 /arch/arm/plat-omap/gpio.c
parent4751227df948582e82f19df30efa662ab71fa980 (diff)
omap: Fix gpio.c for multi-omap for omap4
Set up METHOD_GPIO_44XX instead of trying to use the METHOD_GPIO_24XX. Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/gpio.c')
-rw-r--r--arch/arm/plat-omap/gpio.c224
1 files changed, 133 insertions, 91 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index a888304b8383..6055028dff1e 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -202,6 +202,7 @@ struct gpio_bank {
202#define METHOD_GPIO_1610 2 202#define METHOD_GPIO_1610 2
203#define METHOD_GPIO_7XX 3 203#define METHOD_GPIO_7XX 3
204#define METHOD_GPIO_24XX 5 204#define METHOD_GPIO_24XX 5
205#define METHOD_GPIO_44XX 6
205 206
206#ifdef CONFIG_ARCH_OMAP16XX 207#ifdef CONFIG_ARCH_OMAP16XX
207static struct gpio_bank gpio_bank_1610[5] = { 208static struct gpio_bank gpio_bank_1610[5] = {
@@ -312,17 +313,17 @@ static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
312#ifdef CONFIG_ARCH_OMAP4 313#ifdef CONFIG_ARCH_OMAP4
313static struct gpio_bank gpio_bank_44xx[6] = { 314static struct gpio_bank gpio_bank_44xx[6] = {
314 { OMAP44XX_GPIO1_BASE, NULL, INT_44XX_GPIO_BANK1, IH_GPIO_BASE, 315 { OMAP44XX_GPIO1_BASE, NULL, INT_44XX_GPIO_BANK1, IH_GPIO_BASE,
315 METHOD_GPIO_24XX }, 316 METHOD_GPIO_44XX },
316 { OMAP44XX_GPIO2_BASE, NULL, INT_44XX_GPIO_BANK2, IH_GPIO_BASE + 32, 317 { OMAP44XX_GPIO2_BASE, NULL, INT_44XX_GPIO_BANK2, IH_GPIO_BASE + 32,
317 METHOD_GPIO_24XX }, 318 METHOD_GPIO_44XX },
318 { OMAP44XX_GPIO3_BASE, NULL, INT_44XX_GPIO_BANK3, IH_GPIO_BASE + 64, 319 { OMAP44XX_GPIO3_BASE, NULL, INT_44XX_GPIO_BANK3, IH_GPIO_BASE + 64,
319 METHOD_GPIO_24XX }, 320 METHOD_GPIO_44XX },
320 { OMAP44XX_GPIO4_BASE, NULL, INT_44XX_GPIO_BANK4, IH_GPIO_BASE + 96, 321 { OMAP44XX_GPIO4_BASE, NULL, INT_44XX_GPIO_BANK4, IH_GPIO_BASE + 96,
321 METHOD_GPIO_24XX }, 322 METHOD_GPIO_44XX },
322 { OMAP44XX_GPIO5_BASE, NULL, INT_44XX_GPIO_BANK5, IH_GPIO_BASE + 128, 323 { OMAP44XX_GPIO5_BASE, NULL, INT_44XX_GPIO_BANK5, IH_GPIO_BASE + 128,
323 METHOD_GPIO_24XX }, 324 METHOD_GPIO_44XX },
324 { OMAP44XX_GPIO6_BASE, NULL, INT_44XX_GPIO_BANK6, IH_GPIO_BASE + 160, 325 { OMAP44XX_GPIO6_BASE, NULL, INT_44XX_GPIO_BANK6, IH_GPIO_BASE + 160,
325 METHOD_GPIO_24XX }, 326 METHOD_GPIO_44XX },
326}; 327};
327 328
328#endif 329#endif
@@ -430,7 +431,7 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
430 break; 431 break;
431#endif 432#endif
432#if defined(CONFIG_ARCH_OMAP4) 433#if defined(CONFIG_ARCH_OMAP4)
433 case METHOD_GPIO_24XX: 434 case METHOD_GPIO_44XX:
434 reg += OMAP4_GPIO_OE; 435 reg += OMAP4_GPIO_OE;
435 break; 436 break;
436#endif 437#endif
@@ -501,7 +502,7 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
501 break; 502 break;
502#endif 503#endif
503#ifdef CONFIG_ARCH_OMAP4 504#ifdef CONFIG_ARCH_OMAP4
504 case METHOD_GPIO_24XX: 505 case METHOD_GPIO_44XX:
505 if (enable) 506 if (enable)
506 reg += OMAP4_GPIO_SETDATAOUT; 507 reg += OMAP4_GPIO_SETDATAOUT;
507 else 508 else
@@ -550,7 +551,7 @@ static int _get_gpio_datain(struct gpio_bank *bank, int gpio)
550 break; 551 break;
551#endif 552#endif
552#ifdef CONFIG_ARCH_OMAP4 553#ifdef CONFIG_ARCH_OMAP4
553 case METHOD_GPIO_24XX: 554 case METHOD_GPIO_44XX:
554 reg += OMAP4_GPIO_DATAIN; 555 reg += OMAP4_GPIO_DATAIN;
555 break; 556 break;
556#endif 557#endif
@@ -592,6 +593,7 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
592#endif 593#endif
593#ifdef CONFIG_ARCH_OMAP2PLUS 594#ifdef CONFIG_ARCH_OMAP2PLUS
594 case METHOD_GPIO_24XX: 595 case METHOD_GPIO_24XX:
596 case METHOD_GPIO_44XX:
595 reg += OMAP24XX_GPIO_DATAOUT; 597 reg += OMAP24XX_GPIO_DATAOUT;
596 break; 598 break;
597#endif 599#endif
@@ -622,11 +624,12 @@ void omap_set_gpio_debounce(int gpio, int enable)
622 624
623 bank = get_gpio_bank(gpio); 625 bank = get_gpio_bank(gpio);
624 reg = bank->base; 626 reg = bank->base;
625#ifdef CONFIG_ARCH_OMAP4 627
626 reg += OMAP4_GPIO_DEBOUNCENABLE; 628 if (cpu_is_omap44xx())
627#else 629 reg += OMAP4_GPIO_DEBOUNCENABLE;
628 reg += OMAP24XX_GPIO_DEBOUNCE_EN; 630 else
629#endif 631 reg += OMAP24XX_GPIO_DEBOUNCE_EN;
632
630 if (!(bank->mod_usage & l)) { 633 if (!(bank->mod_usage & l)) {
631 printk(KERN_ERR "GPIO %d not requested\n", gpio); 634 printk(KERN_ERR "GPIO %d not requested\n", gpio);
632 return; 635 return;
@@ -672,11 +675,12 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time)
672 } 675 }
673 676
674 enc_time &= 0xff; 677 enc_time &= 0xff;
675#ifdef CONFIG_ARCH_OMAP4 678
676 reg += OMAP4_GPIO_DEBOUNCINGTIME; 679 if (cpu_is_omap44xx())
677#else 680 reg += OMAP4_GPIO_DEBOUNCINGTIME;
678 reg += OMAP24XX_GPIO_DEBOUNCE_VAL; 681 else
679#endif 682 reg += OMAP24XX_GPIO_DEBOUNCE_VAL;
683
680 __raw_writel(enc_time, reg); 684 __raw_writel(enc_time, reg);
681} 685}
682EXPORT_SYMBOL(omap_set_gpio_debounce_time); 686EXPORT_SYMBOL(omap_set_gpio_debounce_time);
@@ -854,6 +858,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
854#endif 858#endif
855#ifdef CONFIG_ARCH_OMAP2PLUS 859#ifdef CONFIG_ARCH_OMAP2PLUS
856 case METHOD_GPIO_24XX: 860 case METHOD_GPIO_24XX:
861 case METHOD_GPIO_44XX:
857 set_24xx_gpio_triggering(bank, gpio, trigger); 862 set_24xx_gpio_triggering(bank, gpio, trigger);
858 break; 863 break;
859#endif 864#endif
@@ -938,7 +943,7 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
938 break; 943 break;
939#endif 944#endif
940#if defined(CONFIG_ARCH_OMAP4) 945#if defined(CONFIG_ARCH_OMAP4)
941 case METHOD_GPIO_24XX: 946 case METHOD_GPIO_44XX:
942 reg += OMAP4_GPIO_IRQSTATUS0; 947 reg += OMAP4_GPIO_IRQSTATUS0;
943 break; 948 break;
944#endif 949#endif
@@ -949,12 +954,11 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
949 __raw_writel(gpio_mask, reg); 954 __raw_writel(gpio_mask, reg);
950 955
951 /* Workaround for clearing DSP GPIO interrupts to allow retention */ 956 /* Workaround for clearing DSP GPIO interrupts to allow retention */
952#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 957 if (cpu_is_omap24xx() || cpu_is_omap34xx())
953 reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2; 958 reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2;
954#endif 959 else if (cpu_is_omap44xx())
955#if defined(CONFIG_ARCH_OMAP4) 960 reg = bank->base + OMAP4_GPIO_IRQSTATUS1;
956 reg = bank->base + OMAP4_GPIO_IRQSTATUS1; 961
957#endif
958 if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) { 962 if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
959 __raw_writel(gpio_mask, reg); 963 __raw_writel(gpio_mask, reg);
960 964
@@ -1010,7 +1014,7 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
1010 break; 1014 break;
1011#endif 1015#endif
1012#if defined(CONFIG_ARCH_OMAP4) 1016#if defined(CONFIG_ARCH_OMAP4)
1013 case METHOD_GPIO_24XX: 1017 case METHOD_GPIO_44XX:
1014 reg += OMAP4_GPIO_IRQSTATUSSET0; 1018 reg += OMAP4_GPIO_IRQSTATUSSET0;
1015 mask = 0xffffffff; 1019 mask = 0xffffffff;
1016 break; 1020 break;
@@ -1082,7 +1086,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
1082 break; 1086 break;
1083#endif 1087#endif
1084#ifdef CONFIG_ARCH_OMAP4 1088#ifdef CONFIG_ARCH_OMAP4
1085 case METHOD_GPIO_24XX: 1089 case METHOD_GPIO_44XX:
1086 if (enable) 1090 if (enable)
1087 reg += OMAP4_GPIO_IRQSTATUSSET0; 1091 reg += OMAP4_GPIO_IRQSTATUSSET0;
1088 else 1092 else
@@ -1128,6 +1132,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
1128#endif 1132#endif
1129#ifdef CONFIG_ARCH_OMAP2PLUS 1133#ifdef CONFIG_ARCH_OMAP2PLUS
1130 case METHOD_GPIO_24XX: 1134 case METHOD_GPIO_24XX:
1135 case METHOD_GPIO_44XX:
1131 if (bank->non_wakeup_gpios & (1 << gpio)) { 1136 if (bank->non_wakeup_gpios & (1 << gpio)) {
1132 printk(KERN_ERR "Unable to modify wakeup on " 1137 printk(KERN_ERR "Unable to modify wakeup on "
1133 "non-wakeup GPIO%d\n", 1138 "non-wakeup GPIO%d\n",
@@ -1222,7 +1227,8 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
1222 } 1227 }
1223#endif 1228#endif
1224#ifdef CONFIG_ARCH_OMAP2PLUS 1229#ifdef CONFIG_ARCH_OMAP2PLUS
1225 if (bank->method == METHOD_GPIO_24XX) { 1230 if ((bank->method == METHOD_GPIO_24XX) ||
1231 (bank->method == METHOD_GPIO_44XX)) {
1226 /* Disable wake-up during idle for dynamic tick */ 1232 /* Disable wake-up during idle for dynamic tick */
1227 void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA; 1233 void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
1228 __raw_writel(1 << offset, reg); 1234 __raw_writel(1 << offset, reg);
@@ -1284,7 +1290,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
1284 isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1; 1290 isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
1285#endif 1291#endif
1286#if defined(CONFIG_ARCH_OMAP4) 1292#if defined(CONFIG_ARCH_OMAP4)
1287 if (bank->method == METHOD_GPIO_24XX) 1293 if (bank->method == METHOD_GPIO_44XX)
1288 isr_reg = bank->base + OMAP4_GPIO_IRQSTATUS0; 1294 isr_reg = bank->base + OMAP4_GPIO_IRQSTATUS0;
1289#endif 1295#endif
1290 while(1) { 1296 while(1) {
@@ -1564,6 +1570,7 @@ static int gpio_is_input(struct gpio_bank *bank, int mask)
1564 reg += OMAP7XX_GPIO_DIR_CONTROL; 1570 reg += OMAP7XX_GPIO_DIR_CONTROL;
1565 break; 1571 break;
1566 case METHOD_GPIO_24XX: 1572 case METHOD_GPIO_24XX:
1573 case METHOD_GPIO_44XX:
1567 reg += OMAP24XX_GPIO_OE; 1574 reg += OMAP24XX_GPIO_OE;
1568 break; 1575 break;
1569 } 1576 }
@@ -1803,28 +1810,41 @@ static int __init _omap_gpio_init(void)
1803 } 1810 }
1804 1811
1805#ifdef CONFIG_ARCH_OMAP2PLUS 1812#ifdef CONFIG_ARCH_OMAP2PLUS
1806 if (bank->method == METHOD_GPIO_24XX) { 1813 if ((bank->method == METHOD_GPIO_24XX) ||
1814 (bank->method == METHOD_GPIO_44XX)) {
1807 static const u32 non_wakeup_gpios[] = { 1815 static const u32 non_wakeup_gpios[] = {
1808 0xe203ffc0, 0x08700040 1816 0xe203ffc0, 0x08700040
1809 }; 1817 };
1810 if (cpu_is_omap44xx()) { 1818
1811 __raw_writel(0xffffffff, bank->base + 1819 if (cpu_is_omap44xx()) {
1820 __raw_writel(0xffffffff, bank->base +
1812 OMAP4_GPIO_IRQSTATUSCLR0); 1821 OMAP4_GPIO_IRQSTATUSCLR0);
1813 __raw_writew(0x0015, bank->base + 1822 __raw_writew(0x0015, bank->base +
1814 OMAP4_GPIO_SYSCONFIG); 1823 OMAP4_GPIO_SYSCONFIG);
1815 __raw_writel(0x00000000, bank->base + 1824 __raw_writel(0x00000000, bank->base +
1816 OMAP4_GPIO_DEBOUNCENABLE); 1825 OMAP4_GPIO_DEBOUNCENABLE);
1817 /* Initialize interface clock ungated, module enabled */ 1826 /*
1818 __raw_writel(0, bank->base + OMAP4_GPIO_CTRL); 1827 * Initialize interface clock ungated,
1819 } else { 1828 * module enabled
1820 __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_IRQENABLE1); 1829 */
1821 __raw_writel(0xffffffff, bank->base + OMAP24XX_GPIO_IRQSTATUS1); 1830 __raw_writel(0, bank->base + OMAP4_GPIO_CTRL);
1822 __raw_writew(0x0015, bank->base + OMAP24XX_GPIO_SYSCONFIG); 1831 } else {
1823 __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_DEBOUNCE_EN); 1832 __raw_writel(0x00000000, bank->base +
1824 1833 OMAP24XX_GPIO_IRQENABLE1);
1825 /* Initialize interface clock ungated, module enabled */ 1834 __raw_writel(0xffffffff, bank->base +
1826 __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL); 1835 OMAP24XX_GPIO_IRQSTATUS1);
1827 } 1836 __raw_writew(0x0015, bank->base +
1837 OMAP24XX_GPIO_SYSCONFIG);
1838 __raw_writel(0x00000000, bank->base +
1839 OMAP24XX_GPIO_DEBOUNCE_EN);
1840
1841 /*
1842 * Initialize interface clock ungated,
1843 * module enabled
1844 */
1845 __raw_writel(0, bank->base +
1846 OMAP24XX_GPIO_CTRL);
1847 }
1828 if (i < ARRAY_SIZE(non_wakeup_gpios)) 1848 if (i < ARRAY_SIZE(non_wakeup_gpios))
1829 bank->non_wakeup_gpios = non_wakeup_gpios[i]; 1849 bank->non_wakeup_gpios = non_wakeup_gpios[i];
1830 gpio_count = 32; 1850 gpio_count = 32;
@@ -1926,7 +1946,7 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
1926 break; 1946 break;
1927#endif 1947#endif
1928#ifdef CONFIG_ARCH_OMAP4 1948#ifdef CONFIG_ARCH_OMAP4
1929 case METHOD_GPIO_24XX: 1949 case METHOD_GPIO_44XX:
1930 wake_status = bank->base + OMAP4_GPIO_IRQWAKEN0; 1950 wake_status = bank->base + OMAP4_GPIO_IRQWAKEN0;
1931 wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0; 1951 wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
1932 wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0; 1952 wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
@@ -1973,7 +1993,7 @@ static int omap_gpio_resume(struct sys_device *dev)
1973 break; 1993 break;
1974#endif 1994#endif
1975#ifdef CONFIG_ARCH_OMAP4 1995#ifdef CONFIG_ARCH_OMAP4
1976 case METHOD_GPIO_24XX: 1996 case METHOD_GPIO_44XX:
1977 wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0; 1997 wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
1978 wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0; 1998 wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
1979 break; 1999 break;
@@ -2020,29 +2040,42 @@ void omap2_gpio_prepare_for_retention(void)
2020 2040
2021 if (!(bank->enabled_non_wakeup_gpios)) 2041 if (!(bank->enabled_non_wakeup_gpios))
2022 continue; 2042 continue;
2023#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 2043
2024 bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); 2044 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
2025 l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT); 2045 bank->saved_datain = __raw_readl(bank->base +
2026 l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT); 2046 OMAP24XX_GPIO_DATAIN);
2027#endif 2047 l1 = __raw_readl(bank->base +
2028#ifdef CONFIG_ARCH_OMAP4 2048 OMAP24XX_GPIO_FALLINGDETECT);
2029 bank->saved_datain = __raw_readl(bank->base + 2049 l2 = __raw_readl(bank->base +
2030 OMAP4_GPIO_DATAIN); 2050 OMAP24XX_GPIO_RISINGDETECT);
2031 l1 = __raw_readl(bank->base + OMAP4_GPIO_FALLINGDETECT); 2051 }
2032 l2 = __raw_readl(bank->base + OMAP4_GPIO_RISINGDETECT); 2052
2033#endif 2053 if (cpu_is_omap44xx()) {
2054 bank->saved_datain = __raw_readl(bank->base +
2055 OMAP4_GPIO_DATAIN);
2056 l1 = __raw_readl(bank->base +
2057 OMAP4_GPIO_FALLINGDETECT);
2058 l2 = __raw_readl(bank->base +
2059 OMAP4_GPIO_RISINGDETECT);
2060 }
2061
2034 bank->saved_fallingdetect = l1; 2062 bank->saved_fallingdetect = l1;
2035 bank->saved_risingdetect = l2; 2063 bank->saved_risingdetect = l2;
2036 l1 &= ~bank->enabled_non_wakeup_gpios; 2064 l1 &= ~bank->enabled_non_wakeup_gpios;
2037 l2 &= ~bank->enabled_non_wakeup_gpios; 2065 l2 &= ~bank->enabled_non_wakeup_gpios;
2038#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 2066
2039 __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT); 2067 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
2040 __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT); 2068 __raw_writel(l1, bank->base +
2041#endif 2069 OMAP24XX_GPIO_FALLINGDETECT);
2042#ifdef CONFIG_ARCH_OMAP4 2070 __raw_writel(l2, bank->base +
2043 __raw_writel(l1, bank->base + OMAP4_GPIO_FALLINGDETECT); 2071 OMAP24XX_GPIO_RISINGDETECT);
2044 __raw_writel(l2, bank->base + OMAP4_GPIO_RISINGDETECT); 2072 }
2045#endif 2073
2074 if (cpu_is_omap44xx()) {
2075 __raw_writel(l1, bank->base + OMAP4_GPIO_FALLINGDETECT);
2076 __raw_writel(l2, bank->base + OMAP4_GPIO_RISINGDETECT);
2077 }
2078
2046 c++; 2079 c++;
2047 } 2080 }
2048 if (!c) { 2081 if (!c) {
@@ -2064,20 +2097,23 @@ void omap2_gpio_resume_after_retention(void)
2064 2097
2065 if (!(bank->enabled_non_wakeup_gpios)) 2098 if (!(bank->enabled_non_wakeup_gpios))
2066 continue; 2099 continue;
2067#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 2100
2068 __raw_writel(bank->saved_fallingdetect, 2101 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
2102 __raw_writel(bank->saved_fallingdetect,
2069 bank->base + OMAP24XX_GPIO_FALLINGDETECT); 2103 bank->base + OMAP24XX_GPIO_FALLINGDETECT);
2070 __raw_writel(bank->saved_risingdetect, 2104 __raw_writel(bank->saved_risingdetect,
2071 bank->base + OMAP24XX_GPIO_RISINGDETECT); 2105 bank->base + OMAP24XX_GPIO_RISINGDETECT);
2072 l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); 2106 l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
2073#endif 2107 }
2074#ifdef CONFIG_ARCH_OMAP4 2108
2075 __raw_writel(bank->saved_fallingdetect, 2109 if (cpu_is_omap44xx()) {
2110 __raw_writel(bank->saved_fallingdetect,
2076 bank->base + OMAP4_GPIO_FALLINGDETECT); 2111 bank->base + OMAP4_GPIO_FALLINGDETECT);
2077 __raw_writel(bank->saved_risingdetect, 2112 __raw_writel(bank->saved_risingdetect,
2078 bank->base + OMAP4_GPIO_RISINGDETECT); 2113 bank->base + OMAP4_GPIO_RISINGDETECT);
2079 l = __raw_readl(bank->base + OMAP4_GPIO_DATAIN); 2114 l = __raw_readl(bank->base + OMAP4_GPIO_DATAIN);
2080#endif 2115 }
2116
2081 /* Check if any of the non-wakeup interrupt GPIOs have changed 2117 /* Check if any of the non-wakeup interrupt GPIOs have changed
2082 * state. If so, generate an IRQ by software. This is 2118 * state. If so, generate an IRQ by software. This is
2083 * horribly racy, but it's the best we can do to work around 2119 * horribly racy, but it's the best we can do to work around
@@ -2103,30 +2139,36 @@ void omap2_gpio_resume_after_retention(void)
2103 2139
2104 if (gen) { 2140 if (gen) {
2105 u32 old0, old1; 2141 u32 old0, old1;
2106#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 2142
2107 old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); 2143 if (cpu_is_omap24xx() || cpu_is_omap44xx()) {
2108 old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); 2144 old0 = __raw_readl(bank->base +
2145 OMAP24XX_GPIO_LEVELDETECT0);
2146 old1 = __raw_readl(bank->base +
2147 OMAP24XX_GPIO_LEVELDETECT1);
2109 __raw_writel(old0 | gen, bank->base + 2148 __raw_writel(old0 | gen, bank->base +
2110 OMAP24XX_GPIO_LEVELDETECT0); 2149 OMAP24XX_GPIO_LEVELDETECT0);
2111 __raw_writel(old1 | gen, bank->base + 2150 __raw_writel(old1 | gen, bank->base +
2112 OMAP24XX_GPIO_LEVELDETECT1); 2151 OMAP24XX_GPIO_LEVELDETECT1);
2113 __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0); 2152 __raw_writel(old0, bank->base +
2114 __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1); 2153 OMAP24XX_GPIO_LEVELDETECT0);
2115#endif 2154 __raw_writel(old1, bank->base +
2116#ifdef CONFIG_ARCH_OMAP4 2155 OMAP24XX_GPIO_LEVELDETECT1);
2117 old0 = __raw_readl(bank->base + 2156 }
2157
2158 if (cpu_is_omap44xx()) {
2159 old0 = __raw_readl(bank->base +
2118 OMAP4_GPIO_LEVELDETECT0); 2160 OMAP4_GPIO_LEVELDETECT0);
2119 old1 = __raw_readl(bank->base + 2161 old1 = __raw_readl(bank->base +
2120 OMAP4_GPIO_LEVELDETECT1); 2162 OMAP4_GPIO_LEVELDETECT1);
2121 __raw_writel(old0 | l, bank->base + 2163 __raw_writel(old0 | l, bank->base +
2122 OMAP4_GPIO_LEVELDETECT0); 2164 OMAP4_GPIO_LEVELDETECT0);
2123 __raw_writel(old1 | l, bank->base + 2165 __raw_writel(old1 | l, bank->base +
2124 OMAP4_GPIO_LEVELDETECT1); 2166 OMAP4_GPIO_LEVELDETECT1);
2125 __raw_writel(old0, bank->base + 2167 __raw_writel(old0, bank->base +
2126 OMAP4_GPIO_LEVELDETECT0); 2168 OMAP4_GPIO_LEVELDETECT0);
2127 __raw_writel(old1, bank->base + 2169 __raw_writel(old1, bank->base +
2128 OMAP4_GPIO_LEVELDETECT1); 2170 OMAP4_GPIO_LEVELDETECT1);
2129#endif 2171 }
2130 } 2172 }
2131 } 2173 }
2132 2174