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authorTony Lindgren <tony@atomide.com>2009-08-28 13:50:33 -0400
committerTony Lindgren <tony@atomide.com>2009-08-28 13:50:33 -0400
commit941132606c7611246d2034cb7b01f9270c2d1ede (patch)
treee53a618c4e98d3716551afa2e6cfae2be81056a0 /arch/arm/plat-omap/gpio.c
parent326ba5010a5429a5a528b268b36a5900d4ab0eba (diff)
OMAP: Remove OMAP_IO_ADDRESS, use OMAP1_IO_ADDRESS and OMAP2_IO_ADDRESS instead
Search and replace OMAP_IO_ADDRESS with OMAP1_IO_ADDRESS and OMAP2_IO_ADDRESS, and convert omap_read/write into a functions instead of a macros. Also rename OMAP_MPUIO_VBASE to OMAP1_MPUIO_VBASE. In the long run, most code should use ioremap + __raw_read/write instead. Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/gpio.c')
-rw-r--r--arch/arm/plat-omap/gpio.c86
1 files changed, 43 insertions, 43 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 9298bc0ab171..fd63dd3bf4cd 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -31,7 +31,7 @@
31/* 31/*
32 * OMAP1510 GPIO registers 32 * OMAP1510 GPIO registers
33 */ 33 */
34#define OMAP1510_GPIO_BASE IO_ADDRESS(0xfffce000) 34#define OMAP1510_GPIO_BASE OMAP1_IO_ADDRESS(0xfffce000)
35#define OMAP1510_GPIO_DATA_INPUT 0x00 35#define OMAP1510_GPIO_DATA_INPUT 0x00
36#define OMAP1510_GPIO_DATA_OUTPUT 0x04 36#define OMAP1510_GPIO_DATA_OUTPUT 0x04
37#define OMAP1510_GPIO_DIR_CONTROL 0x08 37#define OMAP1510_GPIO_DIR_CONTROL 0x08
@@ -45,10 +45,10 @@
45/* 45/*
46 * OMAP1610 specific GPIO registers 46 * OMAP1610 specific GPIO registers
47 */ 47 */
48#define OMAP1610_GPIO1_BASE IO_ADDRESS(0xfffbe400) 48#define OMAP1610_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbe400)
49#define OMAP1610_GPIO2_BASE IO_ADDRESS(0xfffbec00) 49#define OMAP1610_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbec00)
50#define OMAP1610_GPIO3_BASE IO_ADDRESS(0xfffbb400) 50#define OMAP1610_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbb400)
51#define OMAP1610_GPIO4_BASE IO_ADDRESS(0xfffbbc00) 51#define OMAP1610_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbbc00)
52#define OMAP1610_GPIO_REVISION 0x0000 52#define OMAP1610_GPIO_REVISION 0x0000
53#define OMAP1610_GPIO_SYSCONFIG 0x0010 53#define OMAP1610_GPIO_SYSCONFIG 0x0010
54#define OMAP1610_GPIO_SYSSTATUS 0x0014 54#define OMAP1610_GPIO_SYSSTATUS 0x0014
@@ -70,12 +70,12 @@
70/* 70/*
71 * OMAP730 specific GPIO registers 71 * OMAP730 specific GPIO registers
72 */ 72 */
73#define OMAP730_GPIO1_BASE IO_ADDRESS(0xfffbc000) 73#define OMAP730_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbc000)
74#define OMAP730_GPIO2_BASE IO_ADDRESS(0xfffbc800) 74#define OMAP730_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbc800)
75#define OMAP730_GPIO3_BASE IO_ADDRESS(0xfffbd000) 75#define OMAP730_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbd000)
76#define OMAP730_GPIO4_BASE IO_ADDRESS(0xfffbd800) 76#define OMAP730_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbd800)
77#define OMAP730_GPIO5_BASE IO_ADDRESS(0xfffbe000) 77#define OMAP730_GPIO5_BASE OMAP1_IO_ADDRESS(0xfffbe000)
78#define OMAP730_GPIO6_BASE IO_ADDRESS(0xfffbe800) 78#define OMAP730_GPIO6_BASE OMAP1_IO_ADDRESS(0xfffbe800)
79#define OMAP730_GPIO_DATA_INPUT 0x00 79#define OMAP730_GPIO_DATA_INPUT 0x00
80#define OMAP730_GPIO_DATA_OUTPUT 0x04 80#define OMAP730_GPIO_DATA_OUTPUT 0x04
81#define OMAP730_GPIO_DIR_CONTROL 0x08 81#define OMAP730_GPIO_DIR_CONTROL 0x08
@@ -86,12 +86,12 @@
86/* 86/*
87 * OMAP850 specific GPIO registers 87 * OMAP850 specific GPIO registers
88 */ 88 */
89#define OMAP850_GPIO1_BASE IO_ADDRESS(0xfffbc000) 89#define OMAP850_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbc000)
90#define OMAP850_GPIO2_BASE IO_ADDRESS(0xfffbc800) 90#define OMAP850_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbc800)
91#define OMAP850_GPIO3_BASE IO_ADDRESS(0xfffbd000) 91#define OMAP850_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbd000)
92#define OMAP850_GPIO4_BASE IO_ADDRESS(0xfffbd800) 92#define OMAP850_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbd800)
93#define OMAP850_GPIO5_BASE IO_ADDRESS(0xfffbe000) 93#define OMAP850_GPIO5_BASE OMAP1_IO_ADDRESS(0xfffbe000)
94#define OMAP850_GPIO6_BASE IO_ADDRESS(0xfffbe800) 94#define OMAP850_GPIO6_BASE OMAP1_IO_ADDRESS(0xfffbe800)
95#define OMAP850_GPIO_DATA_INPUT 0x00 95#define OMAP850_GPIO_DATA_INPUT 0x00
96#define OMAP850_GPIO_DATA_OUTPUT 0x04 96#define OMAP850_GPIO_DATA_OUTPUT 0x04
97#define OMAP850_GPIO_DIR_CONTROL 0x08 97#define OMAP850_GPIO_DIR_CONTROL 0x08
@@ -99,19 +99,21 @@
99#define OMAP850_GPIO_INT_MASK 0x10 99#define OMAP850_GPIO_INT_MASK 0x10
100#define OMAP850_GPIO_INT_STATUS 0x14 100#define OMAP850_GPIO_INT_STATUS 0x14
101 101
102#define OMAP1_MPUIO_VBASE OMAP1_IO_ADDRESS(OMAP_MPUIO_BASE)
103
102/* 104/*
103 * omap24xx specific GPIO registers 105 * omap24xx specific GPIO registers
104 */ 106 */
105#define OMAP242X_GPIO1_BASE IO_ADDRESS(0x48018000) 107#define OMAP242X_GPIO1_BASE OMAP2_IO_ADDRESS(0x48018000)
106#define OMAP242X_GPIO2_BASE IO_ADDRESS(0x4801a000) 108#define OMAP242X_GPIO2_BASE OMAP2_IO_ADDRESS(0x4801a000)
107#define OMAP242X_GPIO3_BASE IO_ADDRESS(0x4801c000) 109#define OMAP242X_GPIO3_BASE OMAP2_IO_ADDRESS(0x4801c000)
108#define OMAP242X_GPIO4_BASE IO_ADDRESS(0x4801e000) 110#define OMAP242X_GPIO4_BASE OMAP2_IO_ADDRESS(0x4801e000)
109 111
110#define OMAP243X_GPIO1_BASE IO_ADDRESS(0x4900C000) 112#define OMAP243X_GPIO1_BASE OMAP2_IO_ADDRESS(0x4900C000)
111#define OMAP243X_GPIO2_BASE IO_ADDRESS(0x4900E000) 113#define OMAP243X_GPIO2_BASE OMAP2_IO_ADDRESS(0x4900E000)
112#define OMAP243X_GPIO3_BASE IO_ADDRESS(0x49010000) 114#define OMAP243X_GPIO3_BASE OMAP2_IO_ADDRESS(0x49010000)
113#define OMAP243X_GPIO4_BASE IO_ADDRESS(0x49012000) 115#define OMAP243X_GPIO4_BASE OMAP2_IO_ADDRESS(0x49012000)
114#define OMAP243X_GPIO5_BASE IO_ADDRESS(0x480B6000) 116#define OMAP243X_GPIO5_BASE OMAP2_IO_ADDRESS(0x480B6000)
115 117
116#define OMAP24XX_GPIO_REVISION 0x0000 118#define OMAP24XX_GPIO_REVISION 0x0000
117#define OMAP24XX_GPIO_SYSCONFIG 0x0010 119#define OMAP24XX_GPIO_SYSCONFIG 0x0010
@@ -142,24 +144,22 @@
142 * omap34xx specific GPIO registers 144 * omap34xx specific GPIO registers
143 */ 145 */
144 146
145#define OMAP34XX_GPIO1_BASE IO_ADDRESS(0x48310000) 147#define OMAP34XX_GPIO1_BASE OMAP2_IO_ADDRESS(0x48310000)
146#define OMAP34XX_GPIO2_BASE IO_ADDRESS(0x49050000) 148#define OMAP34XX_GPIO2_BASE OMAP2_IO_ADDRESS(0x49050000)
147#define OMAP34XX_GPIO3_BASE IO_ADDRESS(0x49052000) 149#define OMAP34XX_GPIO3_BASE OMAP2_IO_ADDRESS(0x49052000)
148#define OMAP34XX_GPIO4_BASE IO_ADDRESS(0x49054000) 150#define OMAP34XX_GPIO4_BASE OMAP2_IO_ADDRESS(0x49054000)
149#define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x49056000) 151#define OMAP34XX_GPIO5_BASE OMAP2_IO_ADDRESS(0x49056000)
150#define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x49058000) 152#define OMAP34XX_GPIO6_BASE OMAP2_IO_ADDRESS(0x49058000)
151 153
152/* 154/*
153 * OMAP44XX specific GPIO registers 155 * OMAP44XX specific GPIO registers
154 */ 156 */
155#define OMAP44XX_GPIO1_BASE IO_ADDRESS(0x4a310000) 157#define OMAP44XX_GPIO1_BASE OMAP2_IO_ADDRESS(0x4a310000)
156#define OMAP44XX_GPIO2_BASE IO_ADDRESS(0x48055000) 158#define OMAP44XX_GPIO2_BASE OMAP2_IO_ADDRESS(0x48055000)
157#define OMAP44XX_GPIO3_BASE IO_ADDRESS(0x48057000) 159#define OMAP44XX_GPIO3_BASE OMAP2_IO_ADDRESS(0x48057000)
158#define OMAP44XX_GPIO4_BASE IO_ADDRESS(0x48059000) 160#define OMAP44XX_GPIO4_BASE OMAP2_IO_ADDRESS(0x48059000)
159#define OMAP44XX_GPIO5_BASE IO_ADDRESS(0x4805B000) 161#define OMAP44XX_GPIO5_BASE OMAP2_IO_ADDRESS(0x4805B000)
160#define OMAP44XX_GPIO6_BASE IO_ADDRESS(0x4805D000) 162#define OMAP44XX_GPIO6_BASE OMAP2_IO_ADDRESS(0x4805D000)
161
162#define OMAP_MPUIO_VBASE IO_ADDRESS(OMAP_MPUIO_BASE)
163 163
164struct gpio_bank { 164struct gpio_bank {
165 void __iomem *base; 165 void __iomem *base;
@@ -195,7 +195,7 @@ struct gpio_bank {
195 195
196#ifdef CONFIG_ARCH_OMAP16XX 196#ifdef CONFIG_ARCH_OMAP16XX
197static struct gpio_bank gpio_bank_1610[5] = { 197static struct gpio_bank gpio_bank_1610[5] = {
198 { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO}, 198 { OMAP1_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO},
199 { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 }, 199 { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 },
200 { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 }, 200 { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 },
201 { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 }, 201 { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 },
@@ -205,14 +205,14 @@ static struct gpio_bank gpio_bank_1610[5] = {
205 205
206#ifdef CONFIG_ARCH_OMAP15XX 206#ifdef CONFIG_ARCH_OMAP15XX
207static struct gpio_bank gpio_bank_1510[2] = { 207static struct gpio_bank gpio_bank_1510[2] = {
208 { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, 208 { OMAP1_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
209 { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 } 209 { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 }
210}; 210};
211#endif 211#endif
212 212
213#ifdef CONFIG_ARCH_OMAP730 213#ifdef CONFIG_ARCH_OMAP730
214static struct gpio_bank gpio_bank_730[7] = { 214static struct gpio_bank gpio_bank_730[7] = {
215 { OMAP_MPUIO_VBASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, 215 { OMAP1_MPUIO_VBASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
216 { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 }, 216 { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 },
217 { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 }, 217 { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 },
218 { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 }, 218 { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 },