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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-08-05 17:10:52 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-08-05 17:10:52 -0400
commit13efdbecc65ef6ec4028551fb223dea5c5e3143c (patch)
tree634a2ce082abe3eb2a5defe0f1ddc2f3eb10f085 /arch/arm/plat-omap/gpio.c
parent61f4a10cb4e9447a85245c63b3e7f46e09299fed (diff)
parent6fd210a9cc398ecbff7bcdbe220651b73b654f56 (diff)
Merge branch 'pm-upstream/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into devel-stable
Diffstat (limited to 'arch/arm/plat-omap/gpio.c')
-rw-r--r--arch/arm/plat-omap/gpio.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index f0b71680ec52..00940dc6bb50 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -1292,6 +1292,7 @@ static void gpio_mask_irq(unsigned int irq)
1292 struct gpio_bank *bank = get_irq_chip_data(irq); 1292 struct gpio_bank *bank = get_irq_chip_data(irq);
1293 1293
1294 _set_gpio_irqenable(bank, gpio, 0); 1294 _set_gpio_irqenable(bank, gpio, 0);
1295 _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);
1295} 1296}
1296 1297
1297static void gpio_unmask_irq(unsigned int irq) 1298static void gpio_unmask_irq(unsigned int irq)
@@ -1299,6 +1300,11 @@ static void gpio_unmask_irq(unsigned int irq)
1299 unsigned int gpio = irq - IH_GPIO_BASE; 1300 unsigned int gpio = irq - IH_GPIO_BASE;
1300 struct gpio_bank *bank = get_irq_chip_data(irq); 1301 struct gpio_bank *bank = get_irq_chip_data(irq);
1301 unsigned int irq_mask = 1 << get_gpio_index(gpio); 1302 unsigned int irq_mask = 1 << get_gpio_index(gpio);
1303 struct irq_desc *desc = irq_to_desc(irq);
1304 u32 trigger = desc->status & IRQ_TYPE_SENSE_MASK;
1305
1306 if (trigger)
1307 _set_gpio_triggering(bank, get_gpio_index(gpio), trigger);
1302 1308
1303 /* For level-triggered GPIOs, the clearing must be done after 1309 /* For level-triggered GPIOs, the clearing must be done after
1304 * the HW source is cleared, thus after the handler has run */ 1310 * the HW source is cleared, thus after the handler has run */