Merge 7xx-iosplit-plat-merge with omap-fixes

Merge branch '7xx-iosplit-plat-merge' into omap-for-linus

1 files changed, 269 insertions, 248 deletions

diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 7c345b757df1..4f81ea35b733 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -31,7 +31,7 @@
 /*
  * OMAP1510 GPIO registers
  */
-#define OMAP1510_GPIO_BASE              OMAP1_IO_ADDRESS(0xfffce000)
+#define OMAP1510_GPIO_BASE              0xfffce000
 #define OMAP1510_GPIO_DATA_INPUT        0x00
 #define OMAP1510_GPIO_DATA_OUTPUT       0x04
 #define OMAP1510_GPIO_DIR_CONTROL       0x08
@@ -45,10 +45,10 @@
 /*
  * OMAP1610 specific GPIO registers
  */
-#define OMAP1610_GPIO1_BASE             OMAP1_IO_ADDRESS(0xfffbe400)
-#define OMAP1610_GPIO2_BASE             OMAP1_IO_ADDRESS(0xfffbec00)
-#define OMAP1610_GPIO3_BASE             OMAP1_IO_ADDRESS(0xfffbb400)
-#define OMAP1610_GPIO4_BASE             OMAP1_IO_ADDRESS(0xfffbbc00)
+#define OMAP1610_GPIO1_BASE             0xfffbe400
+#define OMAP1610_GPIO2_BASE             0xfffbec00
+#define OMAP1610_GPIO3_BASE             0xfffbb400
+#define OMAP1610_GPIO4_BASE             0xfffbbc00
 #define OMAP1610_GPIO_REVISION          0x0000
 #define OMAP1610_GPIO_SYSCONFIG         0x0010
 #define OMAP1610_GPIO_SYSSTATUS         0x0014
@@ -68,52 +68,36 @@
 #define OMAP1610_GPIO_SET_DATAOUT       0x00f0
 
 /*
- * OMAP730 specific GPIO registers
+ * OMAP7XX specific GPIO registers
  */
-#define OMAP730_GPIO1_BASE              OMAP1_IO_ADDRESS(0xfffbc000)
-#define OMAP730_GPIO2_BASE              OMAP1_IO_ADDRESS(0xfffbc800)
-#define OMAP730_GPIO3_BASE              OMAP1_IO_ADDRESS(0xfffbd000)
-#define OMAP730_GPIO4_BASE              OMAP1_IO_ADDRESS(0xfffbd800)
-#define OMAP730_GPIO5_BASE              OMAP1_IO_ADDRESS(0xfffbe000)
-#define OMAP730_GPIO6_BASE              OMAP1_IO_ADDRESS(0xfffbe800)
-#define OMAP730_GPIO_DATA_INPUT         0x00
-#define OMAP730_GPIO_DATA_OUTPUT        0x04
-#define OMAP730_GPIO_DIR_CONTROL        0x08
-#define OMAP730_GPIO_INT_CONTROL        0x0c
-#define OMAP730_GPIO_INT_MASK           0x10
-#define OMAP730_GPIO_INT_STATUS         0x14
-
-/*
- * OMAP850 specific GPIO registers
- */
-#define OMAP850_GPIO1_BASE              OMAP1_IO_ADDRESS(0xfffbc000)
-#define OMAP850_GPIO2_BASE              OMAP1_IO_ADDRESS(0xfffbc800)
-#define OMAP850_GPIO3_BASE              OMAP1_IO_ADDRESS(0xfffbd000)
-#define OMAP850_GPIO4_BASE              OMAP1_IO_ADDRESS(0xfffbd800)
-#define OMAP850_GPIO5_BASE              OMAP1_IO_ADDRESS(0xfffbe000)
-#define OMAP850_GPIO6_BASE              OMAP1_IO_ADDRESS(0xfffbe800)
-#define OMAP850_GPIO_DATA_INPUT         0x00
-#define OMAP850_GPIO_DATA_OUTPUT        0x04
-#define OMAP850_GPIO_DIR_CONTROL        0x08
-#define OMAP850_GPIO_INT_CONTROL        0x0c
-#define OMAP850_GPIO_INT_MASK           0x10
-#define OMAP850_GPIO_INT_STATUS         0x14
-
-#define OMAP1_MPUIO_VBASE               OMAP1_IO_ADDRESS(OMAP1_MPUIO_BASE)
+#define OMAP7XX_GPIO1_BASE              0xfffbc000
+#define OMAP7XX_GPIO2_BASE              0xfffbc800
+#define OMAP7XX_GPIO3_BASE              0xfffbd000
+#define OMAP7XX_GPIO4_BASE              0xfffbd800
+#define OMAP7XX_GPIO5_BASE              0xfffbe000
+#define OMAP7XX_GPIO6_BASE              0xfffbe800
+#define OMAP7XX_GPIO_DATA_INPUT         0x00
+#define OMAP7XX_GPIO_DATA_OUTPUT        0x04
+#define OMAP7XX_GPIO_DIR_CONTROL        0x08
+#define OMAP7XX_GPIO_INT_CONTROL        0x0c
+#define OMAP7XX_GPIO_INT_MASK           0x10
+#define OMAP7XX_GPIO_INT_STATUS         0x14
+
+#define OMAP1_MPUIO_VBASE               OMAP1_MPUIO_BASE
 
 /*
  * omap24xx specific GPIO registers
  */
-#define OMAP242X_GPIO1_BASE             OMAP2_IO_ADDRESS(0x48018000)
-#define OMAP242X_GPIO2_BASE             OMAP2_IO_ADDRESS(0x4801a000)
-#define OMAP242X_GPIO3_BASE             OMAP2_IO_ADDRESS(0x4801c000)
-#define OMAP242X_GPIO4_BASE             OMAP2_IO_ADDRESS(0x4801e000)
+#define OMAP242X_GPIO1_BASE             0x48018000
+#define OMAP242X_GPIO2_BASE             0x4801a000
+#define OMAP242X_GPIO3_BASE             0x4801c000
+#define OMAP242X_GPIO4_BASE             0x4801e000
 
-#define OMAP243X_GPIO1_BASE             OMAP2_IO_ADDRESS(0x4900C000)
-#define OMAP243X_GPIO2_BASE             OMAP2_IO_ADDRESS(0x4900E000)
-#define OMAP243X_GPIO3_BASE             OMAP2_IO_ADDRESS(0x49010000)
-#define OMAP243X_GPIO4_BASE             OMAP2_IO_ADDRESS(0x49012000)
-#define OMAP243X_GPIO5_BASE             OMAP2_IO_ADDRESS(0x480B6000)
+#define OMAP243X_GPIO1_BASE             0x4900C000
+#define OMAP243X_GPIO2_BASE             0x4900E000
+#define OMAP243X_GPIO3_BASE             0x49010000
+#define OMAP243X_GPIO4_BASE             0x49012000
+#define OMAP243X_GPIO5_BASE             0x480B6000
 
 #define OMAP24XX_GPIO_REVISION          0x0000
 #define OMAP24XX_GPIO_SYSCONFIG         0x0010
@@ -170,24 +154,25 @@
  * omap34xx specific GPIO registers
  */
 
-#define OMAP34XX_GPIO1_BASE             OMAP2_IO_ADDRESS(0x48310000)
-#define OMAP34XX_GPIO2_BASE             OMAP2_IO_ADDRESS(0x49050000)
-#define OMAP34XX_GPIO3_BASE             OMAP2_IO_ADDRESS(0x49052000)
-#define OMAP34XX_GPIO4_BASE             OMAP2_IO_ADDRESS(0x49054000)
-#define OMAP34XX_GPIO5_BASE             OMAP2_IO_ADDRESS(0x49056000)
-#define OMAP34XX_GPIO6_BASE             OMAP2_IO_ADDRESS(0x49058000)
+#define OMAP34XX_GPIO1_BASE             0x48310000
+#define OMAP34XX_GPIO2_BASE             0x49050000
+#define OMAP34XX_GPIO3_BASE             0x49052000
+#define OMAP34XX_GPIO4_BASE             0x49054000
+#define OMAP34XX_GPIO5_BASE             0x49056000
+#define OMAP34XX_GPIO6_BASE             0x49058000
 
 /*
  * OMAP44XX  specific GPIO registers
  */
-#define OMAP44XX_GPIO1_BASE             OMAP2_IO_ADDRESS(0x4a310000)
-#define OMAP44XX_GPIO2_BASE             OMAP2_IO_ADDRESS(0x48055000)
-#define OMAP44XX_GPIO3_BASE             OMAP2_IO_ADDRESS(0x48057000)
-#define OMAP44XX_GPIO4_BASE             OMAP2_IO_ADDRESS(0x48059000)
-#define OMAP44XX_GPIO5_BASE             OMAP2_IO_ADDRESS(0x4805B000)
-#define OMAP44XX_GPIO6_BASE             OMAP2_IO_ADDRESS(0x4805D000)
+#define OMAP44XX_GPIO1_BASE             0x4a310000
+#define OMAP44XX_GPIO2_BASE             0x48055000
+#define OMAP44XX_GPIO3_BASE             0x48057000
+#define OMAP44XX_GPIO4_BASE             0x48059000
+#define OMAP44XX_GPIO5_BASE             0x4805B000
+#define OMAP44XX_GPIO6_BASE             0x4805D000
 
 struct gpio_bank {
+        unsigned long pbase;
         void __iomem *base;
         u16 irq;
         u16 virtual_irq_start;
@@ -215,96 +200,128 @@ struct gpio_bank {
 #define METHOD_MPUIO            0
 #define METHOD_GPIO_1510        1
 #define METHOD_GPIO_1610        2
-#define METHOD_GPIO_730         3
-#define METHOD_GPIO_850         4
+#define METHOD_GPIO_7XX         3
 #define METHOD_GPIO_24XX        5
 
 #ifdef CONFIG_ARCH_OMAP16XX
 static struct gpio_bank gpio_bank_1610[5] = {
-        { OMAP1_MPUIO_VBASE,    INT_MPUIO,          IH_MPUIO_BASE,     METHOD_MPUIO},
-        { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1,      IH_GPIO_BASE,      METHOD_GPIO_1610 },
-        { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 },
-        { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 },
-        { OMAP1610_GPIO4_BASE, INT_1610_GPIO_BANK4, IH_GPIO_BASE + 48, METHOD_GPIO_1610 },
+        { OMAP1_MPUIO_VBASE, NULL, INT_MPUIO, IH_MPUIO_BASE,
+                METHOD_MPUIO },
+        { OMAP1610_GPIO1_BASE, NULL, INT_GPIO_BANK1, IH_GPIO_BASE,
+                METHOD_GPIO_1610 },
+        { OMAP1610_GPIO2_BASE, NULL, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16,
+                METHOD_GPIO_1610 },
+        { OMAP1610_GPIO3_BASE, NULL, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32,
+                METHOD_GPIO_1610 },
+        { OMAP1610_GPIO4_BASE, NULL, INT_1610_GPIO_BANK4, IH_GPIO_BASE + 48,
+                METHOD_GPIO_1610 },
 };
 #endif
 
 #ifdef CONFIG_ARCH_OMAP15XX
 static struct gpio_bank gpio_bank_1510[2] = {
-        { OMAP1_MPUIO_VBASE,   INT_MPUIO,      IH_MPUIO_BASE, METHOD_MPUIO },
-        { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE,  METHOD_GPIO_1510 }
+        { OMAP1_MPUIO_VBASE, NULL, INT_MPUIO, IH_MPUIO_BASE,
+                METHOD_MPUIO },
+        { OMAP1510_GPIO_BASE, NULL, INT_GPIO_BANK1, IH_GPIO_BASE,
+                METHOD_GPIO_1510 }
 };
 #endif
 
-#ifdef CONFIG_ARCH_OMAP730
-static struct gpio_bank gpio_bank_730[7] = {
-        { OMAP1_MPUIO_VBASE,    INT_730_MPUIO,      IH_MPUIO_BASE,      METHOD_MPUIO },
-        { OMAP730_GPIO1_BASE,  INT_730_GPIO_BANK1,  IH_GPIO_BASE,       METHOD_GPIO_730 },
-        { OMAP730_GPIO2_BASE,  INT_730_GPIO_BANK2,  IH_GPIO_BASE + 32,  METHOD_GPIO_730 },
-        { OMAP730_GPIO3_BASE,  INT_730_GPIO_BANK3,  IH_GPIO_BASE + 64,  METHOD_GPIO_730 },
-        { OMAP730_GPIO4_BASE,  INT_730_GPIO_BANK4,  IH_GPIO_BASE + 96,  METHOD_GPIO_730 },
-        { OMAP730_GPIO5_BASE,  INT_730_GPIO_BANK5,  IH_GPIO_BASE + 128, METHOD_GPIO_730 },
-        { OMAP730_GPIO6_BASE,  INT_730_GPIO_BANK6,  IH_GPIO_BASE + 160, METHOD_GPIO_730 },
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+static struct gpio_bank gpio_bank_7xx[7] = {
+        { OMAP1_MPUIO_VBASE, NULL, INT_7XX_MPUIO, IH_MPUIO_BASE,
+                METHOD_MPUIO },
+        { OMAP7XX_GPIO1_BASE, NULL, INT_7XX_GPIO_BANK1, IH_GPIO_BASE,
+                METHOD_GPIO_7XX },
+        { OMAP7XX_GPIO2_BASE, NULL, INT_7XX_GPIO_BANK2, IH_GPIO_BASE + 32,
+                METHOD_GPIO_7XX },
+        { OMAP7XX_GPIO3_BASE, NULL, INT_7XX_GPIO_BANK3, IH_GPIO_BASE + 64,
+                METHOD_GPIO_7XX },
+        { OMAP7XX_GPIO4_BASE, NULL, INT_7XX_GPIO_BANK4,  IH_GPIO_BASE + 96,
+                METHOD_GPIO_7XX },
+        { OMAP7XX_GPIO5_BASE, NULL, INT_7XX_GPIO_BANK5,  IH_GPIO_BASE + 128,
+                METHOD_GPIO_7XX },
+        { OMAP7XX_GPIO6_BASE, NULL, INT_7XX_GPIO_BANK6,  IH_GPIO_BASE + 160,
+                METHOD_GPIO_7XX },
 };
 #endif
 
-#ifdef CONFIG_ARCH_OMAP850
-static struct gpio_bank gpio_bank_850[7] = {
-        { OMAP1_MPUIO_VBASE,     INT_850_MPUIO,     IH_MPUIO_BASE,      METHOD_MPUIO },
-        { OMAP850_GPIO1_BASE,  INT_850_GPIO_BANK1,  IH_GPIO_BASE,       METHOD_GPIO_850 },
-        { OMAP850_GPIO2_BASE,  INT_850_GPIO_BANK2,  IH_GPIO_BASE + 32,  METHOD_GPIO_850 },
-        { OMAP850_GPIO3_BASE,  INT_850_GPIO_BANK3,  IH_GPIO_BASE + 64,  METHOD_GPIO_850 },
-        { OMAP850_GPIO4_BASE,  INT_850_GPIO_BANK4,  IH_GPIO_BASE + 96,  METHOD_GPIO_850 },
-        { OMAP850_GPIO5_BASE,  INT_850_GPIO_BANK5,  IH_GPIO_BASE + 128, METHOD_GPIO_850 },
-        { OMAP850_GPIO6_BASE,  INT_850_GPIO_BANK6,  IH_GPIO_BASE + 160, METHOD_GPIO_850 },
-};
-#endif
-
-
 #ifdef CONFIG_ARCH_OMAP24XX
 
 static struct gpio_bank gpio_bank_242x[4] = {
-        { OMAP242X_GPIO1_BASE, INT_24XX_GPIO_BANK1, IH_GPIO_BASE,       METHOD_GPIO_24XX },
-        { OMAP242X_GPIO2_BASE, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32,  METHOD_GPIO_24XX },
-        { OMAP242X_GPIO3_BASE, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64,  METHOD_GPIO_24XX },
-        { OMAP242X_GPIO4_BASE, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96,  METHOD_GPIO_24XX },
+        { OMAP242X_GPIO1_BASE, NULL, INT_24XX_GPIO_BANK1, IH_GPIO_BASE,
+                METHOD_GPIO_24XX },
+        { OMAP242X_GPIO2_BASE, NULL, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32,
+                METHOD_GPIO_24XX },
+        { OMAP242X_GPIO3_BASE, NULL, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64,
+                METHOD_GPIO_24XX },
+        { OMAP242X_GPIO4_BASE, NULL, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96,
+                METHOD_GPIO_24XX },
 };
 
 static struct gpio_bank gpio_bank_243x[5] = {
-        { OMAP243X_GPIO1_BASE, INT_24XX_GPIO_BANK1, IH_GPIO_BASE,       METHOD_GPIO_24XX },
-        { OMAP243X_GPIO2_BASE, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32,  METHOD_GPIO_24XX },
-        { OMAP243X_GPIO3_BASE, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64,  METHOD_GPIO_24XX },
-        { OMAP243X_GPIO4_BASE, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96,  METHOD_GPIO_24XX },
-        { OMAP243X_GPIO5_BASE, INT_24XX_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_24XX },
+        { OMAP243X_GPIO1_BASE, NULL, INT_24XX_GPIO_BANK1, IH_GPIO_BASE,
+                METHOD_GPIO_24XX },
+        { OMAP243X_GPIO2_BASE, NULL, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32,
+                METHOD_GPIO_24XX },
+        { OMAP243X_GPIO3_BASE, NULL, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64,
+                METHOD_GPIO_24XX },
+        { OMAP243X_GPIO4_BASE, NULL, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96,
+                METHOD_GPIO_24XX },
+        { OMAP243X_GPIO5_BASE, NULL, INT_24XX_GPIO_BANK5, IH_GPIO_BASE + 128,
+                METHOD_GPIO_24XX },
 };
 
 #endif
 
 #ifdef CONFIG_ARCH_OMAP34XX
 static struct gpio_bank gpio_bank_34xx[6] = {
-        { OMAP34XX_GPIO1_BASE, INT_34XX_GPIO_BANK1, IH_GPIO_BASE,       METHOD_GPIO_24XX },
-        { OMAP34XX_GPIO2_BASE, INT_34XX_GPIO_BANK2, IH_GPIO_BASE + 32,  METHOD_GPIO_24XX },
-        { OMAP34XX_GPIO3_BASE, INT_34XX_GPIO_BANK3, IH_GPIO_BASE + 64,  METHOD_GPIO_24XX },
-        { OMAP34XX_GPIO4_BASE, INT_34XX_GPIO_BANK4, IH_GPIO_BASE + 96,  METHOD_GPIO_24XX },
-        { OMAP34XX_GPIO5_BASE, INT_34XX_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_24XX },
-        { OMAP34XX_GPIO6_BASE, INT_34XX_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_24XX },
+        { OMAP34XX_GPIO1_BASE, NULL, INT_34XX_GPIO_BANK1, IH_GPIO_BASE,
+                METHOD_GPIO_24XX },
+        { OMAP34XX_GPIO2_BASE, NULL, INT_34XX_GPIO_BANK2, IH_GPIO_BASE + 32,
+                METHOD_GPIO_24XX },
+        { OMAP34XX_GPIO3_BASE, NULL, INT_34XX_GPIO_BANK3, IH_GPIO_BASE + 64,
+                METHOD_GPIO_24XX },
+        { OMAP34XX_GPIO4_BASE, NULL, INT_34XX_GPIO_BANK4, IH_GPIO_BASE + 96,
+                METHOD_GPIO_24XX },
+        { OMAP34XX_GPIO5_BASE, NULL, INT_34XX_GPIO_BANK5, IH_GPIO_BASE + 128,
+                METHOD_GPIO_24XX },
+        { OMAP34XX_GPIO6_BASE, NULL, INT_34XX_GPIO_BANK6, IH_GPIO_BASE + 160,
+                METHOD_GPIO_24XX },
+};
+
+struct omap3_gpio_regs {
+        u32 sysconfig;
+        u32 irqenable1;
+        u32 irqenable2;
+        u32 wake_en;
+        u32 ctrl;
+        u32 oe;
+        u32 leveldetect0;
+        u32 leveldetect1;
+        u32 risingdetect;
+        u32 fallingdetect;
+        u32 dataout;
+        u32 setwkuena;
+        u32 setdataout;
 };
 
+static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
 #endif
 
 #ifdef CONFIG_ARCH_OMAP4
 static struct gpio_bank gpio_bank_44xx[6] = {
-        { OMAP44XX_GPIO1_BASE, INT_44XX_GPIO_BANK1, IH_GPIO_BASE,       \
+        { OMAP44XX_GPIO1_BASE, NULL, INT_44XX_GPIO_BANK1, IH_GPIO_BASE,
                 METHOD_GPIO_24XX },
-        { OMAP44XX_GPIO2_BASE, INT_44XX_GPIO_BANK2, IH_GPIO_BASE + 32,  \
+        { OMAP44XX_GPIO2_BASE, NULL, INT_44XX_GPIO_BANK2, IH_GPIO_BASE + 32,
                 METHOD_GPIO_24XX },
-        { OMAP44XX_GPIO3_BASE, INT_44XX_GPIO_BANK3, IH_GPIO_BASE + 64,  \
+        { OMAP44XX_GPIO3_BASE, NULL, INT_44XX_GPIO_BANK3, IH_GPIO_BASE + 64,
                 METHOD_GPIO_24XX },
-        { OMAP44XX_GPIO4_BASE, INT_44XX_GPIO_BANK4, IH_GPIO_BASE + 96,  \
+        { OMAP44XX_GPIO4_BASE, NULL, INT_44XX_GPIO_BANK4, IH_GPIO_BASE + 96,
                 METHOD_GPIO_24XX },
-        { OMAP44XX_GPIO5_BASE, INT_44XX_GPIO_BANK5, IH_GPIO_BASE + 128, \
+        { OMAP44XX_GPIO5_BASE, NULL, INT_44XX_GPIO_BANK5, IH_GPIO_BASE + 128,
                 METHOD_GPIO_24XX },
-        { OMAP44XX_GPIO6_BASE, INT_44XX_GPIO_BANK6, IH_GPIO_BASE + 160, \
+        { OMAP44XX_GPIO6_BASE, NULL, INT_44XX_GPIO_BANK6, IH_GPIO_BASE + 160,
                 METHOD_GPIO_24XX },
 };
 
@@ -402,14 +419,9 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
                 reg += OMAP1610_GPIO_DIRECTION;
                 break;
 #endif
-#ifdef CONFIG_ARCH_OMAP730
-        case METHOD_GPIO_730:
-                reg += OMAP730_GPIO_DIR_CONTROL;
-                break;
-#endif
-#ifdef CONFIG_ARCH_OMAP850
-        case METHOD_GPIO_850:
-                reg += OMAP850_GPIO_DIR_CONTROL;
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+        case METHOD_GPIO_7XX:
+                reg += OMAP7XX_GPIO_DIR_CONTROL;
                 break;
 #endif
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
@@ -469,19 +481,9 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
                 l = 1 << gpio;
                 break;
 #endif
-#ifdef CONFIG_ARCH_OMAP730
-        case METHOD_GPIO_730:
-                reg += OMAP730_GPIO_DATA_OUTPUT;
-                l = __raw_readl(reg);
-                if (enable)
-                        l |= 1 << gpio;
-                else
-                        l &= ~(1 << gpio);
-                break;
-#endif
-#ifdef CONFIG_ARCH_OMAP850
-        case METHOD_GPIO_850:
-                reg += OMAP850_GPIO_DATA_OUTPUT;
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+        case METHOD_GPIO_7XX:
+                reg += OMAP7XX_GPIO_DATA_OUTPUT;
                 l = __raw_readl(reg);
                 if (enable)
                         l |= 1 << gpio;
@@ -537,14 +539,9 @@ static int _get_gpio_datain(struct gpio_bank *bank, int gpio)
                 reg += OMAP1610_GPIO_DATAIN;
                 break;
 #endif
-#ifdef CONFIG_ARCH_OMAP730
-        case METHOD_GPIO_730:
-                reg += OMAP730_GPIO_DATA_INPUT;
-                break;
-#endif
-#ifdef CONFIG_ARCH_OMAP850
-        case METHOD_GPIO_850:
-                reg += OMAP850_GPIO_DATA_INPUT;
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+        case METHOD_GPIO_7XX:
+                reg += OMAP7XX_GPIO_DATA_INPUT;
                 break;
 #endif
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
@@ -588,14 +585,9 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
                 reg += OMAP1610_GPIO_DATAOUT;
                 break;
 #endif
-#ifdef CONFIG_ARCH_OMAP730
-        case METHOD_GPIO_730:
-                reg += OMAP730_GPIO_DATA_OUTPUT;
-                break;
-#endif
-#ifdef CONFIG_ARCH_OMAP850
-        case METHOD_GPIO_850:
-                reg += OMAP850_GPIO_DATA_OUTPUT;
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+        case METHOD_GPIO_7XX:
+                reg += OMAP7XX_GPIO_DATA_OUTPUT;
                 break;
 #endif
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
@@ -797,21 +789,9 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
                         __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA);
                 break;
 #endif
-#ifdef CONFIG_ARCH_OMAP730
-        case METHOD_GPIO_730:
-                reg += OMAP730_GPIO_INT_CONTROL;
-                l = __raw_readl(reg);
-                if (trigger & IRQ_TYPE_EDGE_RISING)
-                        l |= 1 << gpio;
-                else if (trigger & IRQ_TYPE_EDGE_FALLING)
-                        l &= ~(1 << gpio);
-                else
-                        goto bad;
-                break;
-#endif
-#ifdef CONFIG_ARCH_OMAP850
-        case METHOD_GPIO_850:
-                reg += OMAP850_GPIO_INT_CONTROL;
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+        case METHOD_GPIO_7XX:
+                reg += OMAP7XX_GPIO_INT_CONTROL;
                 l = __raw_readl(reg);
                 if (trigger & IRQ_TYPE_EDGE_RISING)
                         l |= 1 << gpio;
@@ -897,14 +877,9 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
                 reg += OMAP1610_GPIO_IRQSTATUS1;
                 break;
 #endif
-#ifdef CONFIG_ARCH_OMAP730
-        case METHOD_GPIO_730:
-                reg += OMAP730_GPIO_INT_STATUS;
-                break;
-#endif
-#ifdef CONFIG_ARCH_OMAP850
-        case METHOD_GPIO_850:
-                reg += OMAP850_GPIO_INT_STATUS;
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+        case METHOD_GPIO_7XX:
+                reg += OMAP7XX_GPIO_INT_STATUS;
                 break;
 #endif
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
@@ -971,16 +946,9 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
                 mask = 0xffff;
                 break;
 #endif
-#ifdef CONFIG_ARCH_OMAP730
-        case METHOD_GPIO_730:
-                reg += OMAP730_GPIO_INT_MASK;
-                mask = 0xffffffff;
-                inv = 1;
-                break;
-#endif
-#ifdef CONFIG_ARCH_OMAP850
-        case METHOD_GPIO_850:
-                reg += OMAP850_GPIO_INT_MASK;
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+        case METHOD_GPIO_7XX:
+                reg += OMAP7XX_GPIO_INT_MASK;
                 mask = 0xffffffff;
                 inv = 1;
                 break;
@@ -1044,19 +1012,9 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
                 l = gpio_mask;
                 break;
 #endif
-#ifdef CONFIG_ARCH_OMAP730
-        case METHOD_GPIO_730:
-                reg += OMAP730_GPIO_INT_MASK;
-                l = __raw_readl(reg);
-                if (enable)
-                        l &= ~(gpio_mask);
-                else
-                        l |= gpio_mask;
-                break;
-#endif
-#ifdef CONFIG_ARCH_OMAP850
-        case METHOD_GPIO_850:
-                reg += OMAP850_GPIO_INT_MASK;
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+        case METHOD_GPIO_7XX:
+                reg += OMAP7XX_GPIO_INT_MASK;
                 l = __raw_readl(reg);
                 if (enable)
                         l &= ~(gpio_mask);
@@ -1249,13 +1207,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
         if (bank->method == METHOD_GPIO_1610)
                 isr_reg = bank->base + OMAP1610_GPIO_IRQSTATUS1;
 #endif
-#ifdef CONFIG_ARCH_OMAP730
-        if (bank->method == METHOD_GPIO_730)
-                isr_reg = bank->base + OMAP730_GPIO_INT_STATUS;
-#endif
-#ifdef CONFIG_ARCH_OMAP850
-        if (bank->method == METHOD_GPIO_850)
-                isr_reg = bank->base + OMAP850_GPIO_INT_STATUS;
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+        if (bank->method == METHOD_GPIO_7XX)
+                isr_reg = bank->base + OMAP7XX_GPIO_INT_STATUS;
 #endif
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
         if (bank->method == METHOD_GPIO_24XX)
@@ -1524,11 +1478,8 @@ static int gpio_is_input(struct gpio_bank *bank, int mask)
         case METHOD_GPIO_1610:
                 reg += OMAP1610_GPIO_DIRECTION;
                 break;
-        case METHOD_GPIO_730:
-                reg += OMAP730_GPIO_DIR_CONTROL;
-                break;
-        case METHOD_GPIO_850:
-                reg += OMAP850_GPIO_DIR_CONTROL;
+        case METHOD_GPIO_7XX:
+                reg += OMAP7XX_GPIO_DIR_CONTROL;
                 break;
         case METHOD_GPIO_24XX:
                 reg += OMAP24XX_GPIO_OE;
@@ -1607,6 +1558,23 @@ static struct clk * gpio5_fck;
 static struct clk *gpio_iclks[OMAP34XX_NR_GPIOS];
 #endif
 
+static void __init omap_gpio_show_rev(void)
+{
+        u32 rev;
+
+        if (cpu_is_omap16xx())
+                rev = __raw_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION);
+        else if (cpu_is_omap24xx() || cpu_is_omap34xx())
+                rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
+        else if (cpu_is_omap44xx())
+                rev = __raw_readl(gpio_bank[0].base + OMAP4_GPIO_REVISION);
+        else
+                return;
+
+        printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n",
+                (rev >> 4) & 0x0f, rev & 0x0f);
+}
+
 /* This lock class tells lockdep that GPIO irqs are in a different
  * category than their parents, so it won't report false recursion.
  */
@@ -1617,6 +1585,7 @@ static int __init _omap_gpio_init(void)
         int i;
         int gpio = 0;
         struct gpio_bank *bank;
+        int bank_size = SZ_8K;  /* Module 4KB + L4 4KB except on omap1 */
         char clk_name[11];
 
         initialized = 1;
@@ -1679,77 +1648,45 @@ static int __init _omap_gpio_init(void)
 
 #ifdef CONFIG_ARCH_OMAP15XX
         if (cpu_is_omap15xx()) {
-                printk(KERN_INFO "OMAP1510 GPIO hardware\n");
                 gpio_bank_count = 2;
                 gpio_bank = gpio_bank_1510;
+                bank_size = SZ_2K;
         }
 #endif
 #if defined(CONFIG_ARCH_OMAP16XX)
         if (cpu_is_omap16xx()) {
-                u32 rev;
-
                 gpio_bank_count = 5;
                 gpio_bank = gpio_bank_1610;
-                rev = __raw_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION);
-                printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n",
-                       (rev >> 4) & 0x0f, rev & 0x0f);
+                bank_size = SZ_2K;
         }
 #endif
-#ifdef CONFIG_ARCH_OMAP730
-        if (cpu_is_omap730()) {
-                printk(KERN_INFO "OMAP730 GPIO hardware\n");
-                gpio_bank_count = 7;
-                gpio_bank = gpio_bank_730;
-        }
-#endif
-#ifdef CONFIG_ARCH_OMAP850
-        if (cpu_is_omap850()) {
-                printk(KERN_INFO "OMAP850 GPIO hardware\n");
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+        if (cpu_is_omap7xx()) {
                 gpio_bank_count = 7;
-                gpio_bank = gpio_bank_850;
+                gpio_bank = gpio_bank_7xx;
+                bank_size = SZ_2K;
         }
 #endif
-
 #ifdef CONFIG_ARCH_OMAP24XX
         if (cpu_is_omap242x()) {
-                int rev;
-
                 gpio_bank_count = 4;
                 gpio_bank = gpio_bank_242x;
-                rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
-                printk(KERN_INFO "OMAP242x GPIO hardware version %d.%d\n",
-                        (rev >> 4) & 0x0f, rev & 0x0f);
         }
         if (cpu_is_omap243x()) {
-                int rev;
-
                 gpio_bank_count = 5;
                 gpio_bank = gpio_bank_243x;
-                rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
-                printk(KERN_INFO "OMAP243x GPIO hardware version %d.%d\n",
-                        (rev >> 4) & 0x0f, rev & 0x0f);
         }
 #endif
 #ifdef CONFIG_ARCH_OMAP34XX
         if (cpu_is_omap34xx()) {
-                int rev;
-
                 gpio_bank_count = OMAP34XX_NR_GPIOS;
                 gpio_bank = gpio_bank_34xx;
-                rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
-                printk(KERN_INFO "OMAP34xx GPIO hardware version %d.%d\n",
-                        (rev >> 4) & 0x0f, rev & 0x0f);
         }
 #endif
 #ifdef CONFIG_ARCH_OMAP4
         if (cpu_is_omap44xx()) {
-                int rev;
-
                 gpio_bank_count = OMAP34XX_NR_GPIOS;
                 gpio_bank = gpio_bank_44xx;
-                rev = __raw_readl(gpio_bank[0].base + OMAP4_GPIO_REVISION);
-                printk(KERN_INFO "OMAP44xx GPIO hardware version %d.%d\n",
-                        (rev >> 4) & 0x0f, rev & 0x0f);
         }
 #endif
         for (i = 0; i < gpio_bank_count; i++) {
@@ -1757,6 +1694,14 @@ static int __init _omap_gpio_init(void)
 
                 bank = &gpio_bank[i];
                 spin_lock_init(&bank->lock);
+
+                /* Static mapping, never released */
+                bank->base = ioremap(bank->pbase, bank_size);
+                if (!bank->base) {
+                        printk(KERN_ERR "Could not ioremap gpio bank%i\n", i);
+                        continue;
+                }
+
                 if (bank_is_mpuio(bank))
                         __raw_writew(0xffff, bank->base + OMAP_MPUIO_GPIO_MASKIT);
                 if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) {
@@ -1768,11 +1713,11 @@ static int __init _omap_gpio_init(void)
                         __raw_writew(0xffff, bank->base + OMAP1610_GPIO_IRQSTATUS1);
                         __raw_writew(0x0014, bank->base + OMAP1610_GPIO_SYSCONFIG);
                 }
-                if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_730) {
-                        __raw_writel(0xffffffff, bank->base + OMAP730_GPIO_INT_MASK);
-                        __raw_writel(0x00000000, bank->base + OMAP730_GPIO_INT_STATUS);
+                if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_7XX) {
+                        __raw_writel(0xffffffff, bank->base + OMAP7XX_GPIO_INT_MASK);
+                        __raw_writel(0x00000000, bank->base + OMAP7XX_GPIO_INT_STATUS);
 
-                        gpio_count = 32; /* 730 has 32-bit GPIOs */
+                        gpio_count = 32; /* 7xx has 32-bit GPIOs */
                 }
 
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
@@ -1862,6 +1807,8 @@ static int __init _omap_gpio_init(void)
         if (cpu_is_omap34xx())
                 omap_writel(1 << 0, 0x48306814);
 
+        omap_gpio_show_rev();
+
         return 0;
 }
 
@@ -2106,6 +2053,81 @@ void omap2_gpio_resume_after_retention(void)
 
 #endif
 
+#ifdef CONFIG_ARCH_OMAP34XX
+/* save the registers of bank 2-6 */
+void omap_gpio_save_context(void)
+{
+        int i;
+
+        /* saving banks from 2-6 only since GPIO1 is in WKUP */
+        for (i = 1; i < gpio_bank_count; i++) {
+                struct gpio_bank *bank = &gpio_bank[i];
+                gpio_context[i].sysconfig =
+                        __raw_readl(bank->base + OMAP24XX_GPIO_SYSCONFIG);
+                gpio_context[i].irqenable1 =
+                        __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
+                gpio_context[i].irqenable2 =
+                        __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2);
+                gpio_context[i].wake_en =
+                        __raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN);
+                gpio_context[i].ctrl =
+                        __raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
+                gpio_context[i].oe =
+                        __raw_readl(bank->base + OMAP24XX_GPIO_OE);
+                gpio_context[i].leveldetect0 =
+                        __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
+                gpio_context[i].leveldetect1 =
+                        __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
+                gpio_context[i].risingdetect =
+                        __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
+                gpio_context[i].fallingdetect =
+                        __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
+                gpio_context[i].dataout =
+                        __raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT);
+                gpio_context[i].setwkuena =
+                        __raw_readl(bank->base + OMAP24XX_GPIO_SETWKUENA);
+                gpio_context[i].setdataout =
+                        __raw_readl(bank->base + OMAP24XX_GPIO_SETDATAOUT);
+        }
+}
+
+/* restore the required registers of bank 2-6 */
+void omap_gpio_restore_context(void)
+{
+        int i;
+
+        for (i = 1; i < gpio_bank_count; i++) {
+                struct gpio_bank *bank = &gpio_bank[i];
+                __raw_writel(gpio_context[i].sysconfig,
+                                bank->base + OMAP24XX_GPIO_SYSCONFIG);
+                __raw_writel(gpio_context[i].irqenable1,
+                                bank->base + OMAP24XX_GPIO_IRQENABLE1);
+                __raw_writel(gpio_context[i].irqenable2,
+                                bank->base + OMAP24XX_GPIO_IRQENABLE2);
+                __raw_writel(gpio_context[i].wake_en,
+                                bank->base + OMAP24XX_GPIO_WAKE_EN);
+                __raw_writel(gpio_context[i].ctrl,
+                                bank->base + OMAP24XX_GPIO_CTRL);
+                __raw_writel(gpio_context[i].oe,
+                                bank->base + OMAP24XX_GPIO_OE);
+                __raw_writel(gpio_context[i].leveldetect0,
+                                bank->base + OMAP24XX_GPIO_LEVELDETECT0);
+                __raw_writel(gpio_context[i].leveldetect1,
+                                bank->base + OMAP24XX_GPIO_LEVELDETECT1);
+                __raw_writel(gpio_context[i].risingdetect,
+                                bank->base + OMAP24XX_GPIO_RISINGDETECT);
+                __raw_writel(gpio_context[i].fallingdetect,
+                                bank->base + OMAP24XX_GPIO_FALLINGDETECT);
+                __raw_writel(gpio_context[i].dataout,
+                                bank->base + OMAP24XX_GPIO_DATAOUT);
+                __raw_writel(gpio_context[i].setwkuena,
+                                bank->base + OMAP24XX_GPIO_SETWKUENA);
+                __raw_writel(gpio_context[i].setdataout,
+                                bank->base + OMAP24XX_GPIO_SETDATAOUT);
+        }
+}
+#endif
+
 /*
  * This may get called early from board specific init
  * for boards that have interrupts routed via FPGA.
@@ -2160,8 +2182,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
 
                 if (bank_is_mpuio(bank))
                         gpio = OMAP_MPUIO(0);
-                else if (cpu_class_is_omap2() || cpu_is_omap730() ||
-                                cpu_is_omap850())
+                else if (cpu_class_is_omap2() || cpu_is_omap7xx())
                         bankwidth = 32;
 
                 for (j = 0; j < bankwidth; j++, gpio++, mask <<= 1) {