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authorTimo Teras <timo.teras@solidboot.com>2006-06-26 19:16:13 -0400
committerTony Lindgren <tony@atomide.com>2006-06-26 19:16:13 -0400
commite32f7ec2e8bf00756c74a5e6a80bc59e949dd81d (patch)
tree1b1e7d588c520ddad11c7ab036c4a50a5e92a49e /arch/arm/plat-omap/dmtimer.c
parent77900a2fc3bfb1eb6eaa6d43eef4591e1f7c600d (diff)
ARM: OMAP: Fix 32 kHz timer and modify GP timer to use GPT1
The dmtimer framework update broke 32 kHz timer as udelay() does not work before system timer is started (and GPT1 should not be reset). This also makes the GP timer use GPT1. This requires a fix in clock framework. Signed-off-by: Timo Teras <timo.teras@solidboot.com> Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/dmtimer.c')
-rw-r--r--arch/arm/plat-omap/dmtimer.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index c25a1a6d2b03..bfccebc77515 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -147,9 +147,10 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer)
147{ 147{
148 u32 l; 148 u32 l;
149 149
150 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06); 150 if (timer != &dm_timers[0]) {
151 omap_dm_timer_wait_for_reset(timer); 151 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
152 152 omap_dm_timer_wait_for_reset(timer);
153 }
153 omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_SYS_CLK); 154 omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_SYS_CLK);
154 155
155 /* Set to smart-idle mode */ 156 /* Set to smart-idle mode */
@@ -335,7 +336,7 @@ void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
335 336
336 /* When the functional clock disappears, too quick writes seem to 337 /* When the functional clock disappears, too quick writes seem to
337 * cause an abort. */ 338 * cause an abort. */
338 udelay(50); 339 __delay(15000);
339} 340}
340 341
341#endif 342#endif