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authorMatthew Percival <matthew@capgo.com>2007-01-25 19:24:29 -0500
committerTony Lindgren <tony@atomide.com>2007-03-02 04:47:11 -0500
commit53037f4c1009c9cf5e6c95a616d1952a240f6540 (patch)
treecff8ec1824d4e1f239cda85626976e150cf745da /arch/arm/plat-omap/dmtimer.c
parente016a40cab504f6e0537fa5bdb3874a2bbefe9dc (diff)
ARM: OMAP: dmtimer.c omap1 register fix
When I went to use dmtimer7 it did not seem to work. I noticed that the base addresses for dmtimers 7 and 8 were set wrong. A simple patch to correct a small error. Confirmed to fix the problem on an OSK. Signed-off-by: Matthew Percival <matthew@capgo.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/dmtimer.c')
-rw-r--r--arch/arm/plat-omap/dmtimer.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 6795f04d17b0..45f0439bffba 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -90,8 +90,8 @@ static struct omap_dm_timer dm_timers[] = {
90 { .phys_base = 0xfffb2c00, .irq = INT_1610_GPTIMER4 }, 90 { .phys_base = 0xfffb2c00, .irq = INT_1610_GPTIMER4 },
91 { .phys_base = 0xfffb3400, .irq = INT_1610_GPTIMER5 }, 91 { .phys_base = 0xfffb3400, .irq = INT_1610_GPTIMER5 },
92 { .phys_base = 0xfffb3c00, .irq = INT_1610_GPTIMER6 }, 92 { .phys_base = 0xfffb3c00, .irq = INT_1610_GPTIMER6 },
93 { .phys_base = 0xfffb4400, .irq = INT_1610_GPTIMER7 }, 93 { .phys_base = 0xfffb7400, .irq = INT_1610_GPTIMER7 },
94 { .phys_base = 0xfffb4c00, .irq = INT_1610_GPTIMER8 }, 94 { .phys_base = 0xfffbd400, .irq = INT_1610_GPTIMER8 },
95}; 95};
96 96
97#elif defined(CONFIG_ARCH_OMAP2) 97#elif defined(CONFIG_ARCH_OMAP2)