diff options
| author | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 20:55:21 -0400 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 20:55:21 -0400 |
| commit | bbb20089a3275a19e475dbc21320c3742e3ca423 (patch) | |
| tree | 216fdc1cbef450ca688135c5b8969169482d9a48 /arch/arm/plat-omap/common.c | |
| parent | 3e48e656903e9fd8bc805c6a2c4264d7808d315b (diff) | |
| parent | 657a77fa7284d8ae28dfa48f1dc5d919bf5b2843 (diff) | |
Merge branch 'dmaengine' into async-tx-next
Conflicts:
crypto/async_tx/async_xor.c
drivers/dma/ioat/dma_v2.h
drivers/dma/ioat/pci.c
drivers/md/raid5.c
Diffstat (limited to 'arch/arm/plat-omap/common.c')
| -rw-r--r-- | arch/arm/plat-omap/common.c | 114 |
1 files changed, 93 insertions, 21 deletions
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index 433021f3d7cc..ebcf006406f9 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c | |||
| @@ -2,6 +2,10 @@ | |||
| 2 | * linux/arch/arm/plat-omap/common.c | 2 | * linux/arch/arm/plat-omap/common.c |
| 3 | * | 3 | * |
| 4 | * Code common to all OMAP machines. | 4 | * Code common to all OMAP machines. |
| 5 | * The file is created by Tony Lindgren <tony@atomide.com> | ||
| 6 | * | ||
| 7 | * Copyright (C) 2009 Texas Instruments | ||
| 8 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 5 | * | 9 | * |
| 6 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as | 11 | * it under the terms of the GNU General Public License version 2 as |
| @@ -11,7 +15,6 @@ | |||
| 11 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
| 12 | #include <linux/init.h> | 16 | #include <linux/init.h> |
| 13 | #include <linux/delay.h> | 17 | #include <linux/delay.h> |
| 14 | #include <linux/pm.h> | ||
| 15 | #include <linux/console.h> | 18 | #include <linux/console.h> |
| 16 | #include <linux/serial.h> | 19 | #include <linux/serial.h> |
| 17 | #include <linux/tty.h> | 20 | #include <linux/tty.h> |
| @@ -175,25 +178,70 @@ console_initcall(omap_add_serial_console); | |||
| 175 | * but systems won't necessarily want to spend resources that way. | 178 | * but systems won't necessarily want to spend resources that way. |
| 176 | */ | 179 | */ |
| 177 | 180 | ||
| 178 | #if defined(CONFIG_ARCH_OMAP16XX) | 181 | #define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410 |
| 179 | #define TIMER_32K_SYNCHRONIZED 0xfffbc410 | ||
| 180 | #elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | ||
| 181 | #define TIMER_32K_SYNCHRONIZED (OMAP2_32KSYNCT_BASE + 0x10) | ||
| 182 | #endif | ||
| 183 | 182 | ||
| 184 | #ifdef TIMER_32K_SYNCHRONIZED | 183 | #if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) |
| 185 | 184 | ||
| 186 | #include <linux/clocksource.h> | 185 | #include <linux/clocksource.h> |
| 187 | 186 | ||
| 188 | static cycle_t omap_32k_read(struct clocksource *cs) | 187 | #ifdef CONFIG_ARCH_OMAP16XX |
| 188 | static cycle_t omap16xx_32k_read(struct clocksource *cs) | ||
| 189 | { | ||
| 190 | return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED); | ||
| 191 | } | ||
| 192 | #else | ||
| 193 | #define omap16xx_32k_read NULL | ||
| 194 | #endif | ||
| 195 | |||
| 196 | #ifdef CONFIG_ARCH_OMAP2420 | ||
| 197 | static cycle_t omap2420_32k_read(struct clocksource *cs) | ||
| 198 | { | ||
| 199 | return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10); | ||
| 200 | } | ||
| 201 | #else | ||
| 202 | #define omap2420_32k_read NULL | ||
| 203 | #endif | ||
| 204 | |||
| 205 | #ifdef CONFIG_ARCH_OMAP2430 | ||
| 206 | static cycle_t omap2430_32k_read(struct clocksource *cs) | ||
| 207 | { | ||
| 208 | return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10); | ||
| 209 | } | ||
| 210 | #else | ||
| 211 | #define omap2430_32k_read NULL | ||
| 212 | #endif | ||
| 213 | |||
| 214 | #ifdef CONFIG_ARCH_OMAP34XX | ||
| 215 | static cycle_t omap34xx_32k_read(struct clocksource *cs) | ||
| 216 | { | ||
| 217 | return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10); | ||
| 218 | } | ||
| 219 | #else | ||
| 220 | #define omap34xx_32k_read NULL | ||
| 221 | #endif | ||
| 222 | |||
| 223 | #ifdef CONFIG_ARCH_OMAP4 | ||
| 224 | static cycle_t omap44xx_32k_read(struct clocksource *cs) | ||
| 189 | { | 225 | { |
| 190 | return omap_readl(TIMER_32K_SYNCHRONIZED); | 226 | return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10); |
| 227 | } | ||
| 228 | #else | ||
| 229 | #define omap44xx_32k_read NULL | ||
| 230 | #endif | ||
| 231 | |||
| 232 | /* | ||
| 233 | * Kernel assumes that sched_clock can be called early but may not have | ||
| 234 | * things ready yet. | ||
| 235 | */ | ||
| 236 | static cycle_t omap_32k_read_dummy(struct clocksource *cs) | ||
| 237 | { | ||
| 238 | return 0; | ||
| 191 | } | 239 | } |
| 192 | 240 | ||
| 193 | static struct clocksource clocksource_32k = { | 241 | static struct clocksource clocksource_32k = { |
| 194 | .name = "32k_counter", | 242 | .name = "32k_counter", |
| 195 | .rating = 250, | 243 | .rating = 250, |
| 196 | .read = omap_32k_read, | 244 | .read = omap_32k_read_dummy, |
| 197 | .mask = CLOCKSOURCE_MASK(32), | 245 | .mask = CLOCKSOURCE_MASK(32), |
| 198 | .shift = 10, | 246 | .shift = 10, |
| 199 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 247 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
| @@ -207,7 +255,7 @@ unsigned long long sched_clock(void) | |||
| 207 | { | 255 | { |
| 208 | unsigned long long ret; | 256 | unsigned long long ret; |
| 209 | 257 | ||
| 210 | ret = (unsigned long long)omap_32k_read(&clocksource_32k); | 258 | ret = (unsigned long long)clocksource_32k.read(&clocksource_32k); |
| 211 | ret = (ret * clocksource_32k.mult_orig) >> clocksource_32k.shift; | 259 | ret = (ret * clocksource_32k.mult_orig) >> clocksource_32k.shift; |
| 212 | return ret; | 260 | return ret; |
| 213 | } | 261 | } |
| @@ -220,6 +268,19 @@ static int __init omap_init_clocksource_32k(void) | |||
| 220 | if (cpu_is_omap16xx() || cpu_class_is_omap2()) { | 268 | if (cpu_is_omap16xx() || cpu_class_is_omap2()) { |
| 221 | struct clk *sync_32k_ick; | 269 | struct clk *sync_32k_ick; |
| 222 | 270 | ||
| 271 | if (cpu_is_omap16xx()) | ||
| 272 | clocksource_32k.read = omap16xx_32k_read; | ||
| 273 | else if (cpu_is_omap2420()) | ||
| 274 | clocksource_32k.read = omap2420_32k_read; | ||
| 275 | else if (cpu_is_omap2430()) | ||
| 276 | clocksource_32k.read = omap2430_32k_read; | ||
| 277 | else if (cpu_is_omap34xx()) | ||
| 278 | clocksource_32k.read = omap34xx_32k_read; | ||
| 279 | else if (cpu_is_omap44xx()) | ||
| 280 | clocksource_32k.read = omap44xx_32k_read; | ||
| 281 | else | ||
| 282 | return -ENODEV; | ||
| 283 | |||
| 223 | sync_32k_ick = clk_get(NULL, "omap_32ksync_ick"); | 284 | sync_32k_ick = clk_get(NULL, "omap_32ksync_ick"); |
| 224 | if (sync_32k_ick) | 285 | if (sync_32k_ick) |
| 225 | clk_enable(sync_32k_ick); | 286 | clk_enable(sync_32k_ick); |
| @@ -234,15 +295,13 @@ static int __init omap_init_clocksource_32k(void) | |||
| 234 | } | 295 | } |
| 235 | arch_initcall(omap_init_clocksource_32k); | 296 | arch_initcall(omap_init_clocksource_32k); |
| 236 | 297 | ||
| 237 | #endif /* TIMER_32K_SYNCHRONIZED */ | 298 | #endif /* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */ |
| 238 | 299 | ||
| 239 | /* Global address base setup code */ | 300 | /* Global address base setup code */ |
| 240 | 301 | ||
| 241 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) | 302 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) |
| 242 | 303 | ||
| 243 | static struct omap_globals *omap2_globals; | 304 | static void __init __omap2_set_globals(struct omap_globals *omap2_globals) |
| 244 | |||
| 245 | static void __init __omap2_set_globals(void) | ||
| 246 | { | 305 | { |
| 247 | omap2_set_globals_tap(omap2_globals); | 306 | omap2_set_globals_tap(omap2_globals); |
| 248 | omap2_set_globals_sdrc(omap2_globals); | 307 | omap2_set_globals_sdrc(omap2_globals); |
| @@ -266,8 +325,7 @@ static struct omap_globals omap242x_globals = { | |||
| 266 | 325 | ||
| 267 | void __init omap2_set_globals_242x(void) | 326 | void __init omap2_set_globals_242x(void) |
| 268 | { | 327 | { |
| 269 | omap2_globals = &omap242x_globals; | 328 | __omap2_set_globals(&omap242x_globals); |
| 270 | __omap2_set_globals(); | ||
| 271 | } | 329 | } |
| 272 | #endif | 330 | #endif |
| 273 | 331 | ||
| @@ -285,8 +343,7 @@ static struct omap_globals omap243x_globals = { | |||
| 285 | 343 | ||
| 286 | void __init omap2_set_globals_243x(void) | 344 | void __init omap2_set_globals_243x(void) |
| 287 | { | 345 | { |
| 288 | omap2_globals = &omap243x_globals; | 346 | __omap2_set_globals(&omap243x_globals); |
| 289 | __omap2_set_globals(); | ||
| 290 | } | 347 | } |
| 291 | #endif | 348 | #endif |
| 292 | 349 | ||
| @@ -304,8 +361,23 @@ static struct omap_globals omap343x_globals = { | |||
| 304 | 361 | ||
| 305 | void __init omap2_set_globals_343x(void) | 362 | void __init omap2_set_globals_343x(void) |
| 306 | { | 363 | { |
| 307 | omap2_globals = &omap343x_globals; | 364 | __omap2_set_globals(&omap343x_globals); |
| 308 | __omap2_set_globals(); | 365 | } |
| 366 | #endif | ||
| 367 | |||
| 368 | #if defined(CONFIG_ARCH_OMAP4) | ||
| 369 | static struct omap_globals omap4_globals = { | ||
| 370 | .class = OMAP443X_CLASS, | ||
| 371 | .tap = OMAP2_IO_ADDRESS(0x4830a000), | ||
| 372 | .ctrl = OMAP2_IO_ADDRESS(OMAP443X_CTRL_BASE), | ||
| 373 | .prm = OMAP2_IO_ADDRESS(OMAP4430_PRM_BASE), | ||
| 374 | .cm = OMAP2_IO_ADDRESS(OMAP4430_CM_BASE), | ||
| 375 | }; | ||
| 376 | |||
| 377 | void __init omap2_set_globals_443x(void) | ||
| 378 | { | ||
| 379 | omap2_set_globals_tap(&omap4_globals); | ||
| 380 | omap2_set_globals_control(&omap4_globals); | ||
| 309 | } | 381 | } |
| 310 | #endif | 382 | #endif |
| 311 | 383 | ||
