aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/plat-nomadik
diff options
context:
space:
mode:
authorRabin Vincent <rabin.vincent@stericsson.com>2010-05-06 05:43:55 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-05-06 15:17:19 -0400
commit7a852d8060e1bb3a5e621caaebea86c43cf4a62d (patch)
tree3c3ea7aa4c69bcc382d09b2cbc6e9b99189c24d6 /arch/arm/plat-nomadik
parent040e5ecddaa72f1f982b83cb205509bc9ce7f91e (diff)
ARM: 6101/1: nomadik-gpio: don't enable in set_type
On this peripheral, setting the trigger type enables the interrupt, and the current set_type() implementation unconditionally enables the interrupt, even if it is called when the interrupt is disabled. Fix set_type() to: - if the interrupt is disabled, defer the actual trigger setting to when it is unmasked - if the interrupt is enabled, change the type immediately by clearing the old type and then re-enabling with the new type. Acked-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-nomadik')
-rw-r--r--arch/arm/plat-nomadik/gpio.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/arch/arm/plat-nomadik/gpio.c b/arch/arm/plat-nomadik/gpio.c
index a8ac545ddadc..b877d76878f9 100644
--- a/arch/arm/plat-nomadik/gpio.c
+++ b/arch/arm/plat-nomadik/gpio.c
@@ -162,6 +162,7 @@ static void nmk_gpio_irq_unmask(unsigned int irq)
162 162
163static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type) 163static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
164{ 164{
165 bool enabled = !(irq_to_desc(irq)->status & IRQ_DISABLED);
165 int gpio; 166 int gpio;
166 struct nmk_gpio_chip *nmk_chip; 167 struct nmk_gpio_chip *nmk_chip;
167 unsigned long flags; 168 unsigned long flags;
@@ -180,19 +181,21 @@ static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
180 181
181 spin_lock_irqsave(&nmk_chip->lock, flags); 182 spin_lock_irqsave(&nmk_chip->lock, flags);
182 183
184 if (enabled)
185 __nmk_gpio_irq_modify(nmk_chip, gpio, false);
186
183 nmk_chip->edge_rising &= ~bitmask; 187 nmk_chip->edge_rising &= ~bitmask;
184 if (type & IRQ_TYPE_EDGE_RISING) 188 if (type & IRQ_TYPE_EDGE_RISING)
185 nmk_chip->edge_rising |= bitmask; 189 nmk_chip->edge_rising |= bitmask;
186 writel(nmk_chip->edge_rising, nmk_chip->addr + NMK_GPIO_RIMSC);
187 190
188 nmk_chip->edge_falling &= ~bitmask; 191 nmk_chip->edge_falling &= ~bitmask;
189 if (type & IRQ_TYPE_EDGE_FALLING) 192 if (type & IRQ_TYPE_EDGE_FALLING)
190 nmk_chip->edge_falling |= bitmask; 193 nmk_chip->edge_falling |= bitmask;
191 writel(nmk_chip->edge_falling, nmk_chip->addr + NMK_GPIO_FIMSC);
192 194
193 spin_unlock_irqrestore(&nmk_chip->lock, flags); 195 if (enabled)
196 __nmk_gpio_irq_modify(nmk_chip, gpio, true);
194 197
195 nmk_gpio_irq_unmask(irq); 198 spin_unlock_irqrestore(&nmk_chip->lock, flags);
196 199
197 return 0; 200 return 0;
198} 201}