diff options
author | Rabin Vincent <rabin.vincent@stericsson.com> | 2010-05-06 05:42:42 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-05-06 15:17:18 -0400 |
commit | 040e5ecddaa72f1f982b83cb205509bc9ce7f91e (patch) | |
tree | 0fea453828a29b4df0a4fe373bd13986c1bf4543 /arch/arm/plat-nomadik | |
parent | 6b07aaedc029d507501a931aabfd3d0a70f1828f (diff) |
ARM: 6100/1: nomadik-gpio: factor out helper to enable/disable irqs
Remove some nearly-duplicated code to make the following patch simpler.
Acked-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-nomadik')
-rw-r--r-- | arch/arm/plat-nomadik/gpio.c | 57 |
1 files changed, 27 insertions, 30 deletions
diff --git a/arch/arm/plat-nomadik/gpio.c b/arch/arm/plat-nomadik/gpio.c index 38fc3b5d9872..a8ac545ddadc 100644 --- a/arch/arm/plat-nomadik/gpio.c +++ b/arch/arm/plat-nomadik/gpio.c | |||
@@ -107,40 +107,37 @@ static void nmk_gpio_irq_ack(unsigned int irq) | |||
107 | writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC); | 107 | writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC); |
108 | } | 108 | } |
109 | 109 | ||
110 | static void nmk_gpio_irq_mask(unsigned int irq) | 110 | static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip, |
111 | int gpio, bool enable) | ||
111 | { | 112 | { |
112 | int gpio; | 113 | u32 bitmask = nmk_gpio_get_bitmask(gpio); |
113 | struct nmk_gpio_chip *nmk_chip; | 114 | u32 reg; |
114 | unsigned long flags; | ||
115 | u32 bitmask, reg; | ||
116 | |||
117 | gpio = NOMADIK_IRQ_TO_GPIO(irq); | ||
118 | nmk_chip = get_irq_chip_data(irq); | ||
119 | bitmask = nmk_gpio_get_bitmask(gpio); | ||
120 | if (!nmk_chip) | ||
121 | return; | ||
122 | 115 | ||
123 | /* we must individually clear the two edges */ | 116 | /* we must individually set/clear the two edges */ |
124 | spin_lock_irqsave(&nmk_chip->lock, flags); | ||
125 | if (nmk_chip->edge_rising & bitmask) { | 117 | if (nmk_chip->edge_rising & bitmask) { |
126 | reg = readl(nmk_chip->addr + NMK_GPIO_RIMSC); | 118 | reg = readl(nmk_chip->addr + NMK_GPIO_RIMSC); |
127 | reg &= ~bitmask; | 119 | if (enable) |
120 | reg |= bitmask; | ||
121 | else | ||
122 | reg &= ~bitmask; | ||
128 | writel(reg, nmk_chip->addr + NMK_GPIO_RIMSC); | 123 | writel(reg, nmk_chip->addr + NMK_GPIO_RIMSC); |
129 | } | 124 | } |
130 | if (nmk_chip->edge_falling & bitmask) { | 125 | if (nmk_chip->edge_falling & bitmask) { |
131 | reg = readl(nmk_chip->addr + NMK_GPIO_FIMSC); | 126 | reg = readl(nmk_chip->addr + NMK_GPIO_FIMSC); |
132 | reg &= ~bitmask; | 127 | if (enable) |
128 | reg |= bitmask; | ||
129 | else | ||
130 | reg &= ~bitmask; | ||
133 | writel(reg, nmk_chip->addr + NMK_GPIO_FIMSC); | 131 | writel(reg, nmk_chip->addr + NMK_GPIO_FIMSC); |
134 | } | 132 | } |
135 | spin_unlock_irqrestore(&nmk_chip->lock, flags); | 133 | } |
136 | }; | ||
137 | 134 | ||
138 | static void nmk_gpio_irq_unmask(unsigned int irq) | 135 | static void nmk_gpio_irq_modify(unsigned int irq, bool enable) |
139 | { | 136 | { |
140 | int gpio; | 137 | int gpio; |
141 | struct nmk_gpio_chip *nmk_chip; | 138 | struct nmk_gpio_chip *nmk_chip; |
142 | unsigned long flags; | 139 | unsigned long flags; |
143 | u32 bitmask, reg; | 140 | u32 bitmask; |
144 | 141 | ||
145 | gpio = NOMADIK_IRQ_TO_GPIO(irq); | 142 | gpio = NOMADIK_IRQ_TO_GPIO(irq); |
146 | nmk_chip = get_irq_chip_data(irq); | 143 | nmk_chip = get_irq_chip_data(irq); |
@@ -148,21 +145,21 @@ static void nmk_gpio_irq_unmask(unsigned int irq) | |||
148 | if (!nmk_chip) | 145 | if (!nmk_chip) |
149 | return; | 146 | return; |
150 | 147 | ||
151 | /* we must individually set the two edges */ | ||
152 | spin_lock_irqsave(&nmk_chip->lock, flags); | 148 | spin_lock_irqsave(&nmk_chip->lock, flags); |
153 | if (nmk_chip->edge_rising & bitmask) { | 149 | __nmk_gpio_irq_modify(nmk_chip, gpio, enable); |
154 | reg = readl(nmk_chip->addr + NMK_GPIO_RIMSC); | ||
155 | reg |= bitmask; | ||
156 | writel(reg, nmk_chip->addr + NMK_GPIO_RIMSC); | ||
157 | } | ||
158 | if (nmk_chip->edge_falling & bitmask) { | ||
159 | reg = readl(nmk_chip->addr + NMK_GPIO_FIMSC); | ||
160 | reg |= bitmask; | ||
161 | writel(reg, nmk_chip->addr + NMK_GPIO_FIMSC); | ||
162 | } | ||
163 | spin_unlock_irqrestore(&nmk_chip->lock, flags); | 150 | spin_unlock_irqrestore(&nmk_chip->lock, flags); |
164 | } | 151 | } |
165 | 152 | ||
153 | static void nmk_gpio_irq_mask(unsigned int irq) | ||
154 | { | ||
155 | nmk_gpio_irq_modify(irq, false); | ||
156 | }; | ||
157 | |||
158 | static void nmk_gpio_irq_unmask(unsigned int irq) | ||
159 | { | ||
160 | nmk_gpio_irq_modify(irq, true); | ||
161 | } | ||
162 | |||
166 | static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type) | 163 | static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type) |
167 | { | 164 | { |
168 | int gpio; | 165 | int gpio; |