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authorRabin Vincent <rabin.vincent@stericsson.com>2010-09-02 06:28:48 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-09-02 10:52:19 -0400
commit6720db7cc592b2148e0d88a7d76dc0532f3d266c (patch)
tree68b2ba061880c163358bc4d5144dac99c127596a /arch/arm/plat-nomadik
parent7e3f7e59ccc6ed8b243de9941ffd09d2ad7a5b9c (diff)
ARM: 6354/1: nomadik-gpio: allow control of sleep mode direction and pull up
DB8500v2 allows control of direction and pull up/down configuration in sleep mode, instead of switching the pin to input with pull up/down enabled. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-nomadik')
-rw-r--r--arch/arm/plat-nomadik/gpio.c42
-rw-r--r--arch/arm/plat-nomadik/include/plat/pincfg.h31
2 files changed, 61 insertions, 12 deletions
diff --git a/arch/arm/plat-nomadik/gpio.c b/arch/arm/plat-nomadik/gpio.c
index 014da39b6a88..7afc7e8850b6 100644
--- a/arch/arm/plat-nomadik/gpio.c
+++ b/arch/arm/plat-nomadik/gpio.c
@@ -102,6 +102,22 @@ static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip,
102 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC); 102 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
103} 103}
104 104
105static void __nmk_gpio_set_output(struct nmk_gpio_chip *nmk_chip,
106 unsigned offset, int val)
107{
108 if (val)
109 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATS);
110 else
111 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATC);
112}
113
114static void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip,
115 unsigned offset, int val)
116{
117 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
118 __nmk_gpio_set_output(nmk_chip, offset, val);
119}
120
105static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset, 121static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,
106 pin_cfg_t cfg) 122 pin_cfg_t cfg)
107{ 123{
@@ -126,12 +142,21 @@ static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,
126 int pull = PIN_PULL(cfg); 142 int pull = PIN_PULL(cfg);
127 int af = PIN_ALT(cfg); 143 int af = PIN_ALT(cfg);
128 int slpm = PIN_SLPM(cfg); 144 int slpm = PIN_SLPM(cfg);
145 int output = PIN_DIR(cfg);
146 int val = PIN_VAL(cfg);
129 147
130 dev_dbg(nmk_chip->chip.dev, "pin %d: af %s, pull %s, slpm %s\n", 148 dev_dbg(nmk_chip->chip.dev, "pin %d: af %s, pull %s, slpm %s (%s%s)\n",
131 pin, afnames[af], pullnames[pull], slpmnames[slpm]); 149 pin, afnames[af], pullnames[pull], slpmnames[slpm],
150 output ? "output " : "input",
151 output ? (val ? "high" : "low") : "");
152
153 if (output)
154 __nmk_gpio_make_output(nmk_chip, offset, val);
155 else {
156 __nmk_gpio_make_input(nmk_chip, offset);
157 __nmk_gpio_set_pull(nmk_chip, offset, pull);
158 }
132 159
133 __nmk_gpio_make_input(nmk_chip, offset);
134 __nmk_gpio_set_pull(nmk_chip, offset, pull);
135 __nmk_gpio_set_slpm(nmk_chip, offset, slpm); 160 __nmk_gpio_set_slpm(nmk_chip, offset, slpm);
136 __nmk_gpio_set_mode(nmk_chip, offset, af); 161 __nmk_gpio_set_mode(nmk_chip, offset, af);
137} 162}
@@ -519,12 +544,8 @@ static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
519{ 544{
520 struct nmk_gpio_chip *nmk_chip = 545 struct nmk_gpio_chip *nmk_chip =
521 container_of(chip, struct nmk_gpio_chip, chip); 546 container_of(chip, struct nmk_gpio_chip, chip);
522 u32 bit = 1 << offset;
523 547
524 if (val) 548 __nmk_gpio_set_output(nmk_chip, offset, val);
525 writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
526 else
527 writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
528} 549}
529 550
530static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset, 551static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
@@ -533,8 +554,7 @@ static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
533 struct nmk_gpio_chip *nmk_chip = 554 struct nmk_gpio_chip *nmk_chip =
534 container_of(chip, struct nmk_gpio_chip, chip); 555 container_of(chip, struct nmk_gpio_chip, chip);
535 556
536 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS); 557 __nmk_gpio_make_output(nmk_chip, offset, val);
537 nmk_gpio_set_output(chip, offset, val);
538 558
539 return 0; 559 return 0;
540} 560}
diff --git a/arch/arm/plat-nomadik/include/plat/pincfg.h b/arch/arm/plat-nomadik/include/plat/pincfg.h
index 432a201b3b41..8c5ae3f2acf8 100644
--- a/arch/arm/plat-nomadik/include/plat/pincfg.h
+++ b/arch/arm/plat-nomadik/include/plat/pincfg.h
@@ -19,12 +19,16 @@
19 * bit 9..10 - Alternate Function Selection 19 * bit 9..10 - Alternate Function Selection
20 * bit 11..12 - Pull up/down state 20 * bit 11..12 - Pull up/down state
21 * bit 13 - Sleep mode behaviour 21 * bit 13 - Sleep mode behaviour
22 * bit 14 - (sleep mode) Direction
23 * bit 15 - (sleep mode) Value (if output)
22 * 24 *
23 * to facilitate the definition, the following macros are provided 25 * to facilitate the definition, the following macros are provided
24 * 26 *
25 * PIN_CFG_DEFAULT - default config (0): 27 * PIN_CFG_DEFAULT - default config (0):
26 * pull up/down = disabled 28 * pull up/down = disabled
27 * sleep mode = input/wakeup 29 * sleep mode = input/wakeup
30 * (sleep mode) direction = input
31 * (sleep mode) value = low
28 * 32 *
29 * PIN_CFG - default config with alternate function 33 * PIN_CFG - default config with alternate function
30 * PIN_CFG_PULL - default config with alternate function and pull up/down 34 * PIN_CFG_PULL - default config with alternate function and pull up/down
@@ -53,12 +57,37 @@ typedef unsigned long pin_cfg_t;
53#define PIN_SLPM_SHIFT 13 57#define PIN_SLPM_SHIFT 13
54#define PIN_SLPM_MASK (0x1 << PIN_SLPM_SHIFT) 58#define PIN_SLPM_MASK (0x1 << PIN_SLPM_SHIFT)
55#define PIN_SLPM(x) (((x) & PIN_SLPM_MASK) >> PIN_SLPM_SHIFT) 59#define PIN_SLPM(x) (((x) & PIN_SLPM_MASK) >> PIN_SLPM_SHIFT)
56#define PIN_SLPM_INPUT (NMK_GPIO_SLPM_INPUT << PIN_SLPM_SHIFT) 60#define PIN_SLPM_MAKE_INPUT (NMK_GPIO_SLPM_INPUT << PIN_SLPM_SHIFT)
57#define PIN_SLPM_NOCHANGE (NMK_GPIO_SLPM_NOCHANGE << PIN_SLPM_SHIFT) 61#define PIN_SLPM_NOCHANGE (NMK_GPIO_SLPM_NOCHANGE << PIN_SLPM_SHIFT)
58/* These two replace the above in DB8500v2+ */ 62/* These two replace the above in DB8500v2+ */
59#define PIN_SLPM_WAKEUP_ENABLE (NMK_GPIO_SLPM_WAKEUP_ENABLE << PIN_SLPM_SHIFT) 63#define PIN_SLPM_WAKEUP_ENABLE (NMK_GPIO_SLPM_WAKEUP_ENABLE << PIN_SLPM_SHIFT)
60#define PIN_SLPM_WAKEUP_DISABLE (NMK_GPIO_SLPM_WAKEUP_DISABLE << PIN_SLPM_SHIFT) 64#define PIN_SLPM_WAKEUP_DISABLE (NMK_GPIO_SLPM_WAKEUP_DISABLE << PIN_SLPM_SHIFT)
61 65
66#define PIN_DIR_SHIFT 14
67#define PIN_DIR_MASK (0x1 << PIN_DIR_SHIFT)
68#define PIN_DIR(x) (((x) & PIN_DIR_MASK) >> PIN_DIR_SHIFT)
69#define PIN_DIR_INPUT (0 << PIN_DIR_SHIFT)
70#define PIN_DIR_OUTPUT (1 << PIN_DIR_SHIFT)
71
72#define PIN_VAL_SHIFT 15
73#define PIN_VAL_MASK (0x1 << PIN_VAL_SHIFT)
74#define PIN_VAL(x) (((x) & PIN_VAL_MASK) >> PIN_VAL_SHIFT)
75#define PIN_VAL_LOW (0 << PIN_VAL_SHIFT)
76#define PIN_VAL_HIGH (1 << PIN_VAL_SHIFT)
77
78/* Shortcuts. Use these instead of separate DIR and VAL. */
79#define PIN_INPUT PIN_DIR_INPUT
80#define PIN_OUTPUT_LOW (PIN_DIR_OUTPUT | PIN_VAL_LOW)
81#define PIN_OUTPUT_HIGH (PIN_DIR_OUTPUT | PIN_VAL_HIGH)
82
83/*
84 * These are the same as the ones above, but should make more sense to the
85 * reader when seen along with a setting a pin to AF mode.
86 */
87#define PIN_SLPM_INPUT PIN_INPUT
88#define PIN_SLPM_OUTPUT_LOW PIN_OUTPUT_LOW
89#define PIN_SLPM_OUTPUT_HIGH PIN_OUTPUT_HIGH
90
62#define PIN_CFG_DEFAULT (PIN_PULL_NONE | PIN_SLPM_INPUT) 91#define PIN_CFG_DEFAULT (PIN_PULL_NONE | PIN_SLPM_INPUT)
63 92
64#define PIN_CFG(num, alt) \ 93#define PIN_CFG(num, alt) \