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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2009-11-10 04:15:13 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2009-11-18 04:40:33 -0500
commit27085f25184ee5a206706dd5f734ade1d15551fa (patch)
tree9460e9289f570d8fc26af4ed58adbd8797815a77 /arch/arm/plat-mxc
parent104071b6dcc66cd66db83231fd3bd58cd63e680d (diff)
imx: reorder mx21.h
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r--arch/arm/plat-mxc/include/mach/mx21.h24
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h
index 21112c695ec5..2b1fccb748fb 100644
--- a/arch/arm/plat-mxc/include/mach/mx21.h
+++ b/arch/arm/plat-mxc/include/mach/mx21.h
@@ -34,8 +34,8 @@
34#define CS2_BASE_ADDR 0xD0000000 34#define CS2_BASE_ADDR 0xD0000000
35#define CS3_BASE_ADDR 0xD1000000 35#define CS3_BASE_ADDR 0xD1000000
36#define CS4_BASE_ADDR 0xD2000000 36#define CS4_BASE_ADDR 0xD2000000
37#define CS5_BASE_ADDR 0xDD000000
38#define PCMCIA_MEM_BASE_ADDR 0xD4000000 37#define PCMCIA_MEM_BASE_ADDR 0xD4000000
38#define CS5_BASE_ADDR 0xDD000000
39 39
40/* NAND, SDRAM, WEIM etc controllers */ 40/* NAND, SDRAM, WEIM etc controllers */
41#define X_MEMC_BASE_ADDR 0xDF000000 41#define X_MEMC_BASE_ADDR 0xDF000000
@@ -50,21 +50,21 @@
50#define IRAM_BASE_ADDR 0xFFFFE800 /* internal ram */ 50#define IRAM_BASE_ADDR 0xFFFFE800 /* internal ram */
51 51
52/* fixed interrupt numbers */ 52/* fixed interrupt numbers */
53#define MXC_INT_FIRI 9
54#define MXC_INT_BMI 30
55#define MXC_INT_EMMAENC 49
56#define MXC_INT_EMMADEC 50
57#define MXC_INT_USBWKUP 53
58#define MXC_INT_USBDMA 54
59#define MXC_INT_USBHOST 55
60#define MXC_INT_USBFUNC 56
61#define MXC_INT_USBMNP 57
53#define MXC_INT_USBCTRL 58 62#define MXC_INT_USBCTRL 58
54#define MXC_INT_USBCTRL 58 63#define MXC_INT_USBCTRL 58
55#define MXC_INT_USBMNP 57
56#define MXC_INT_USBFUNC 56
57#define MXC_INT_USBHOST 55
58#define MXC_INT_USBDMA 54
59#define MXC_INT_USBWKUP 53
60#define MXC_INT_EMMADEC 50
61#define MXC_INT_EMMAENC 49
62#define MXC_INT_BMI 30
63#define MXC_INT_FIRI 9
64 64
65/* fixed DMA request numbers */ 65/* fixed DMA request numbers */
66#define DMA_REQ_BMI_RX 29
67#define DMA_REQ_BMI_TX 28
68#define DMA_REQ_FIRI_RX 4 66#define DMA_REQ_FIRI_RX 4
67#define DMA_REQ_BMI_TX 28
68#define DMA_REQ_BMI_RX 29
69 69
70#endif /* __ASM_ARCH_MXC_MX21_H__ */ 70#endif /* __ASM_ARCH_MXC_MX21_H__ */