Add i.MX25 support

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

11 files changed, 89 insertions, 1 deletions

diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index 0617c19f85cb..e342a2e61601 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -20,6 +20,13 @@ config ARCH_MX2
         help
           This enables support for systems based on the Freescale i.MX2 family
 
+config ARCH_MX25
+        bool "MX25-based"
+        select CPU_ARM926T
+        select COMMON_CLKDEV
+        help
+          This enables support for systems based on the Freescale i.MX25 family
+
 config ARCH_MX3
         bool "MX3-based"
         select CPU_V6
@@ -32,6 +39,7 @@ endchoice
 source "arch/arm/mach-mx1/Kconfig"
 source "arch/arm/mach-mx2/Kconfig"
 source "arch/arm/mach-mx3/Kconfig"
+source "arch/arm/mach-mx25/Kconfig"
 
 endmenu
 
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
index f0315edb3eb9..cfc4a8b43e6a 100644
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -297,7 +297,7 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
                 /* its a serious configuration bug when it fails */
                 BUG_ON( gpiochip_add(&port[i].chip) < 0 );
 
-                if (cpu_is_mx1() || cpu_is_mx3()) {
+                if (cpu_is_mx1() || cpu_is_mx3() || cpu_is_mx25()) {
                         /* setup one handler for each entry */
                         set_irq_chained_handler(port[i].irq, mx3_gpio_irq_handler);
                         set_irq_data(port[i].irq, &port[i]);
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index cd8f215c1ad2..4e7af7412396 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -16,18 +16,21 @@ struct clk;
 
 extern void mx1_map_io(void);
 extern void mx21_map_io(void);
+extern void mx25_map_io(void);
 extern void mx27_map_io(void);
 extern void mx31_map_io(void);
 extern void mx35_map_io(void);
 extern void mxc_init_irq(void __iomem *);
 extern void mx1_init_irq(void);
 extern void mx21_init_irq(void);
+extern void mx25_init_irq(void);
 extern void mx27_init_irq(void);
 extern void mx31_init_irq(void);
 extern void mx35_init_irq(void);
 extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int);
 extern int mx1_clocks_init(unsigned long fref);
 extern int mx21_clocks_init(unsigned long lref, unsigned long fref);
+extern int mx25_clocks_init(unsigned long fref);
 extern int mx27_clocks_init(unsigned long fref);
 extern int mx31_clocks_init(unsigned long fref);
 extern int mx35_clocks_init(void);
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index 4f85acd74afe..bf683de56b76 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -17,6 +17,15 @@
 #define UART_VADDR      IO_ADDRESS(UART1_BASE_ADDR)
 #endif
 
+#ifdef CONFIG_ARCH_MX25
+#ifdef UART_PADDR
+#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
+#endif
+#include <mach/mx25.h>
+#define UART_PADDR      UART1_BASE_ADDR
+#define UART_VADDR      MX25_AIPS1_IO_ADDRESS(UART1_BASE_ADDR)
+#endif
+
 #ifdef CONFIG_ARCH_MX2
 #ifdef UART_PADDR
 #error "CONFIG_DEBUG_LL is incompatible with multiple archs"
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index 42e4ee37ca1f..569af3239c3c 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -42,6 +42,10 @@
 # include <mach/mx1.h>
 #endif
 
+#ifdef CONFIG_ARCH_MX25
+# include <mach/mx25.h>
+#endif
+
 #include <mach/mxc.h>
 
 #endif /* __ASM_ARCH_MXC_HARDWARE_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
index 518a36504b88..f39e016c1cc5 100644
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ b/arch/arm/plat-mxc/include/mach/irqs.h
@@ -24,6 +24,8 @@
 #define MXC_GPIO_IRQS           (32 * 6)
 #elif defined CONFIG_ARCH_MX3
 #define MXC_GPIO_IRQS           (32 * 3)
+#elif defined CONFIG_ARCH_MX25
+#define MXC_GPIO_IRQS           (32 * 4)
 #endif
 
 /*
diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h
index 6065e00176ed..42db73941118 100644
--- a/arch/arm/plat-mxc/include/mach/memory.h
+++ b/arch/arm/plat-mxc/include/mach/memory.h
@@ -22,6 +22,8 @@
 #endif
 #elif defined CONFIG_ARCH_MX3
 #define PHYS_OFFSET             UL(0x80000000)
+#elif defined CONFIG_ARCH_MX25
+#define PHYS_OFFSET             UL(0x80000000)
 #endif
 
 #if defined(CONFIG_MX1_VIDEO)
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
new file mode 100644
index 000000000000..ec64bd9a8ab1
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -0,0 +1,44 @@
+#ifndef __MACH_MX25_H__
+#define __MACH_MX25_H__
+
+#define MX25_AIPS1_BASE_ADDR            0x43F00000
+#define MX25_AIPS1_BASE_ADDR_VIRT       0xFC000000
+#define MX25_AIPS1_SIZE                 SZ_1M
+#define MX25_AIPS2_BASE_ADDR            0x53F00000
+#define MX25_AIPS2_BASE_ADDR_VIRT       0xFC200000
+#define MX25_AIPS2_SIZE                 SZ_1M
+#define MX25_AVIC_BASE_ADDR             0x68000000
+#define MX25_AVIC_BASE_ADDR_VIRT        0xFC400000
+#define MX25_AVIC_SIZE                  SZ_1M
+
+#define MX25_IOMUXC_BASE_ADDR           (MX25_AIPS1_BASE_ADDR + 0xac000)
+
+#define MX25_CRM_BASE_ADDR              (MX25_AIPS2_BASE_ADDR + 0x80000)
+#define MX25_GPT1_BASE_ADDR             (MX25_AIPS2_BASE_ADDR + 0x90000)
+#define MX25_WDOG_BASE_ADDR             (MX25_AIPS2_BASE_ADDR + 0xdc000)
+
+#define MX25_GPIO1_BASE_ADDR_VIRT       (MX25_AIPS2_BASE_ADDR_VIRT + 0xcc000)
+#define MX25_GPIO2_BASE_ADDR_VIRT       (MX25_AIPS2_BASE_ADDR_VIRT + 0xd0000)
+#define MX25_GPIO3_BASE_ADDR_VIRT       (MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000)
+#define MX25_GPIO4_BASE_ADDR_VIRT       (MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000)
+
+#define MX25_AIPS1_IO_ADDRESS(x)  \
+        (((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT)
+#define MX25_AIPS2_IO_ADDRESS(x)  \
+        (((x) - MX25_AIPS2_BASE_ADDR) + MX25_AIPS2_BASE_ADDR_VIRT)
+#define MX25_AVIC_IO_ADDRESS(x)  \
+        (((x) - MX25_AVIC_BASE_ADDR) + MX25_AVIC_BASE_ADDR_VIRT)
+
+#define __in_range(addr, name)  ((addr) >= name##_BASE_ADDR && (addr) < name##_BASE_ADDR + name##_SIZE)
+
+#define MX25_IO_ADDRESS(x)                                      \
+        (void __force __iomem *)                                \
+        (__in_range(x, MX25_AIPS1) ? MX25_AIPS1_IO_ADDRESS(x) : \
+        __in_range(x, MX25_AIPS2) ? MX25_AIPS2_IO_ADDRESS(x) :  \
+        __in_range(x, MX25_AVIC) ? MX25_AVIC_IO_ADDRESS(x) :    \
+        0xDEADBEEF)
+
+#define UART1_BASE_ADDR                 0x43f90000
+#define UART2_BASE_ADDR                 0x43f94000
+
+#endif /* __MACH_MX25_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 5fa2a07f4eaf..882b816729bd 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -26,6 +26,7 @@
 
 #define MXC_CPU_MX1             1
 #define MXC_CPU_MX21            21
+#define MXC_CPU_MX25            25
 #define MXC_CPU_MX27            27
 #define MXC_CPU_MX31            31
 #define MXC_CPU_MX35            35
@@ -58,6 +59,18 @@ extern unsigned int __mxc_cpu_type;
 # define cpu_is_mx21()          (0)
 #endif
 
+#ifdef CONFIG_ARCH_MX25
+# ifdef mxc_cpu_type
+#  undef mxc_cpu_type
+#  define mxc_cpu_type __mxc_cpu_type
+# else
+#  define mxc_cpu_type MXC_CPU_MX25
+# endif
+# define cpu_is_mx25()          (mxc_cpu_type == MXC_CPU_MX25)
+#else
+# define cpu_is_mx25()          (0)
+#endif
+
 #ifdef CONFIG_MACH_MX27
 # ifdef mxc_cpu_type
 #  undef mxc_cpu_type
diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h
index 07b4a73c9d2f..0707b7d5b5ce 100644
--- a/arch/arm/plat-mxc/include/mach/timex.h
+++ b/arch/arm/plat-mxc/include/mach/timex.h
@@ -26,6 +26,8 @@
 #define CLOCK_TICK_RATE         13300000
 #elif defined CONFIG_ARCH_MX3
 #define CLOCK_TICK_RATE         16625000
+#elif defined CONFIG_ARCH_MX25
+#define CLOCK_TICK_RATE         16000000
 #endif
 
 #endif                          /* __ASM_ARCH_MXC_TIMEX_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index 98c8a60214d6..b6650e705e31 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -63,6 +63,7 @@ static void putc(int ch)
 #define flush() do { } while (0)
 
 #define MX1_UART1_BASE_ADDR     0x00206000
+#define MX25_UART1_BASE_ADDR    0x43f90000
 #define MX2X_UART1_BASE_ADDR    0x1000a000
 #define MX3X_UART1_BASE_ADDR    0x43F90000