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authorThomas Gleixner <tglx@linutronix.de>2011-03-24 08:35:09 -0400
committerThomas Gleixner <tglx@linutronix.de>2011-03-29 08:47:58 -0400
commitf38c02f3b338651e145aac2889ba976baf6b28b3 (patch)
tree30cfbf42ccff4a9dc26d95e9058ec76f5fde78bb /arch/arm/plat-mxc
parent9323f26186403433293e87e717a7785f74f75d80 (diff)
arm: Fold irq_set_chip/irq_set_handler
Use irq_set_chip_and_handler() instead. Converted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r--arch/arm/plat-mxc/3ds_debugboard.c3
-rw-r--r--arch/arm/plat-mxc/avic.c4
-rw-r--r--arch/arm/plat-mxc/gpio.c4
-rw-r--r--arch/arm/plat-mxc/tzic.c4
4 files changed, 7 insertions, 8 deletions
diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/plat-mxc/3ds_debugboard.c
index 9d424ce93354..f0ba0726306c 100644
--- a/arch/arm/plat-mxc/3ds_debugboard.c
+++ b/arch/arm/plat-mxc/3ds_debugboard.c
@@ -181,8 +181,7 @@ int __init mxc_expio_init(u32 base, u32 p_irq)
181 __raw_writew(0x1F, brd_io + INTR_MASK_REG); 181 __raw_writew(0x1F, brd_io + INTR_MASK_REG);
182 for (i = MXC_EXP_IO_BASE; 182 for (i = MXC_EXP_IO_BASE;
183 i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); i++) { 183 i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); i++) {
184 irq_set_chip(i, &expio_irq_chip); 184 irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq);
185 irq_set_handler(i, handle_level_irq);
186 set_irq_flags(i, IRQF_VALID); 185 set_irq_flags(i, IRQF_VALID);
187 } 186 }
188 irq_set_irq_type(p_irq, IRQF_TRIGGER_LOW); 187 irq_set_irq_type(p_irq, IRQF_TRIGGER_LOW);
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c
index 8b30c83a2ab1..09e2bd0fcdca 100644
--- a/arch/arm/plat-mxc/avic.c
+++ b/arch/arm/plat-mxc/avic.c
@@ -139,8 +139,8 @@ void __init mxc_init_irq(void __iomem *irqbase)
139 __raw_writel(0, avic_base + AVIC_INTTYPEH); 139 __raw_writel(0, avic_base + AVIC_INTTYPEH);
140 __raw_writel(0, avic_base + AVIC_INTTYPEL); 140 __raw_writel(0, avic_base + AVIC_INTTYPEL);
141 for (i = 0; i < MXC_INTERNAL_IRQS; i++) { 141 for (i = 0; i < MXC_INTERNAL_IRQS; i++) {
142 irq_set_chip(i, &mxc_avic_chip.base); 142 irq_set_chip_and_handler(i, &mxc_avic_chip.base,
143 irq_set_handler(i, handle_level_irq); 143 handle_level_irq);
144 set_irq_flags(i, IRQF_VALID); 144 set_irq_flags(i, IRQF_VALID);
145 } 145 }
146 146
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
index 2ff0b3f9b46d..7a107246fd98 100644
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -311,8 +311,8 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
311 __raw_writel(~0, port[i].base + GPIO_ISR); 311 __raw_writel(~0, port[i].base + GPIO_ISR);
312 for (j = port[i].virtual_irq_start; 312 for (j = port[i].virtual_irq_start;
313 j < port[i].virtual_irq_start + 32; j++) { 313 j < port[i].virtual_irq_start + 32; j++) {
314 irq_set_chip(j, &gpio_irq_chip); 314 irq_set_chip_and_handler(j, &gpio_irq_chip,
315 irq_set_handler(j, handle_level_irq); 315 handle_level_irq);
316 set_irq_flags(j, IRQF_VALID); 316 set_irq_flags(j, IRQF_VALID);
317 } 317 }
318 318
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
index c299152e0841..57f9395f87ce 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/plat-mxc/tzic.c
@@ -167,8 +167,8 @@ void __init tzic_init_irq(void __iomem *irqbase)
167 /* all IRQ no FIQ Warning :: No selection */ 167 /* all IRQ no FIQ Warning :: No selection */
168 168
169 for (i = 0; i < MXC_INTERNAL_IRQS; i++) { 169 for (i = 0; i < MXC_INTERNAL_IRQS; i++) {
170 irq_set_chip(i, &mxc_tzic_chip.base); 170 irq_set_chip_and_handler(i, &mxc_tzic_chip.base,
171 irq_set_handler(i, handle_level_irq); 171 handle_level_irq);
172 set_irq_flags(i, IRQF_VALID); 172 set_irq_flags(i, IRQF_VALID);
173 } 173 }
174 174