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authorSascha Hauer <s.hauer@pengutronix.de>2009-06-04 07:29:57 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2009-08-07 06:10:52 -0400
commitd30c74a02f7652e784c32a10736a3c88db98820c (patch)
tree403389ec4d91e450eced8b527dca8b2f48a200f5 /arch/arm/plat-mxc
parentabae61305684fffb0f1d779a1a678855ec5e8cfc (diff)
MXC uncompress macros: determine uart base by machine type
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r--arch/arm/plat-mxc/include/mach/uncompress.h60
1 files changed, 42 insertions, 18 deletions
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index de6fe0365982..98c8a60214d6 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -26,8 +26,11 @@
26#define __MXC_BOOT_UNCOMPRESS 26#define __MXC_BOOT_UNCOMPRESS
27 27
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/mach-types.h>
29 30
30#define UART(x) (*(volatile unsigned long *)(serial_port + (x))) 31static unsigned long uart_base;
32
33#define UART(x) (*(volatile unsigned long *)(uart_base + (x)))
31 34
32#define USR2 0x98 35#define USR2 0x98
33#define USR2_TXFE (1<<14) 36#define USR2_TXFE (1<<14)
@@ -46,19 +49,10 @@
46 49
47static void putc(int ch) 50static void putc(int ch)
48{ 51{
49 static unsigned long serial_port = 0; 52 if (!uart_base)
50 53 return;
51 if (unlikely(serial_port == 0)) { 54 if (!(UART(UCR1) & UCR1_UARTEN))
52 do { 55 return;
53 serial_port = UART1_BASE_ADDR;
54 if (UART(UCR1) & UCR1_UARTEN)
55 break;
56 serial_port = UART2_BASE_ADDR;
57 if (UART(UCR1) & UCR1_UARTEN)
58 break;
59 return;
60 } while (0);
61 }
62 56
63 while (!(UART(USR2) & USR2_TXFE)) 57 while (!(UART(USR2) & USR2_TXFE))
64 barrier(); 58 barrier();
@@ -68,11 +62,41 @@ static void putc(int ch)
68 62
69#define flush() do { } while (0) 63#define flush() do { } while (0)
70 64
71/* 65#define MX1_UART1_BASE_ADDR 0x00206000
72 * nothing to do 66#define MX2X_UART1_BASE_ADDR 0x1000a000
73 */ 67#define MX3X_UART1_BASE_ADDR 0x43F90000
74#define arch_decomp_setup() 68
69static __inline__ void __arch_decomp_setup(unsigned long arch_id)
70{
71 switch (arch_id) {
72 case MACH_TYPE_MX1ADS:
73 case MACH_TYPE_SCB9328:
74 uart_base = MX1_UART1_BASE_ADDR;
75 break;
76 case MACH_TYPE_IMX27LITE:
77 case MACH_TYPE_MX27_3DS:
78 case MACH_TYPE_MX27ADS:
79 case MACH_TYPE_PCM038:
80 case MACH_TYPE_MX21ADS:
81 uart_base = MX2X_UART1_BASE_ADDR;
82 break;
83 case MACH_TYPE_MX31LITE:
84 case MACH_TYPE_ARMADILLO5X0:
85 case MACH_TYPE_MX31MOBOARD:
86 case MACH_TYPE_QONG:
87 case MACH_TYPE_MX31_3DS:
88 case MACH_TYPE_PCM037:
89 case MACH_TYPE_MX31ADS:
90 case MACH_TYPE_MX35_3DS:
91 case MACH_TYPE_PCM043:
92 uart_base = MX3X_UART1_BASE_ADDR;
93 break;
94 default:
95 break;
96 }
97}
75 98
99#define arch_decomp_setup() __arch_decomp_setup(arch_id)
76#define arch_decomp_wdog() 100#define arch_decomp_wdog()
77 101
78#endif /* __ASM_ARCH_MXC_UNCOMPRESS_H__ */ 102#endif /* __ASM_ARCH_MXC_UNCOMPRESS_H__ */