diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-30 10:50:45 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-30 10:50:45 -0400 |
commit | 85eb1513c15652cdaa9fd656345825bf55514a96 (patch) | |
tree | b445b8d6d9184a897a2656a9f16a6ec592137644 /arch/arm/plat-mxc | |
parent | e122996ae1edf2caf19643cb79366fc2117a6188 (diff) | |
parent | b43d151e9679a06df896ac3db65a9dca80040fed (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (65 commits)
ARM: 6826/1: Merge v6 and v7 DEBUG_LL DCC support
ARM: 6838/1: etm: fix section mismatch warning
ARM: 6837/1: remove unused pci_fixup_prpmc1100
ARM: 6836/1: kprobes/fix emulation of LDR/STR instruction when Rn == PC
Fix the broken build for Marvell Dove platform.
ARM: 6835/1: perf: ensure overflows aren't missed due to IRQ latency
ARM: 6834/1: perf: reset counters on all CPUs during initialisation
ARM: 6833/1: perf: add required isbs() to ARMv7 backend
ARM: 6825/1: kernel/sleep.S: fix Thumb2 compilation issues
ARM: 6807/1: realview: Fix secondary GIC initialisation for EB with MPCore tile
arm: mach-mx3: pcm043: add write-protect and card-detect for SD1
eukrea_mbimxsd51: add SD Card detect
eukrea_mbimxsd25-baseboard: add SD card detect
mx3/eukrea_mbimxsd-baseboard: add SD card detect support
mx3/eukrea_mbimxsd-baseboard: fix gpio request
ARM: mxs/mx28evk: add mmc device
ARM: mxs/mx23evk: add mmc device
ARM: mxs: dynamically allocate mmc device
ARM: mx51_efika: update platform data for new mfd changes
mx2/iomux: Set direction for CSPI2 pins
...
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r-- | arch/arm/plat-mxc/devices/platform-fec.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-mxc/devices/platform-imxdi_rtc.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/audmux.h | 10 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx2x.h | 12 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mx50.h | 4 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mx51.h | 1 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mxc.h | 23 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/system.h | 6 | ||||
-rw-r--r-- | arch/arm/plat-mxc/time.c | 25 |
9 files changed, 74 insertions, 11 deletions
diff --git a/arch/arm/plat-mxc/devices/platform-fec.c b/arch/arm/plat-mxc/devices/platform-fec.c index 6561c9df5f0d..ccc789e21daa 100644 --- a/arch/arm/plat-mxc/devices/platform-fec.c +++ b/arch/arm/plat-mxc/devices/platform-fec.c | |||
@@ -53,7 +53,7 @@ struct platform_device *__init imx_add_fec( | |||
53 | struct resource res[] = { | 53 | struct resource res[] = { |
54 | { | 54 | { |
55 | .start = data->iobase, | 55 | .start = data->iobase, |
56 | .end = data->iobase + SZ_4K, | 56 | .end = data->iobase + SZ_4K - 1, |
57 | .flags = IORESOURCE_MEM, | 57 | .flags = IORESOURCE_MEM, |
58 | }, { | 58 | }, { |
59 | .start = data->irq, | 59 | .start = data->irq, |
diff --git a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c b/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c index 10653cc8d1fa..805336fdc252 100644 --- a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c +++ b/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c | |||
@@ -27,7 +27,7 @@ struct platform_device *__init imx_add_imxdi_rtc( | |||
27 | struct resource res[] = { | 27 | struct resource res[] = { |
28 | { | 28 | { |
29 | .start = data->iobase, | 29 | .start = data->iobase, |
30 | .end = data->iobase + SZ_16K, | 30 | .end = data->iobase + SZ_16K - 1, |
31 | .flags = IORESOURCE_MEM, | 31 | .flags = IORESOURCE_MEM, |
32 | }, { | 32 | }, { |
33 | .start = data->irq, | 33 | .start = data->irq, |
diff --git a/arch/arm/plat-mxc/include/mach/audmux.h b/arch/arm/plat-mxc/include/mach/audmux.h index 5cd6466964af..6fda788ed0e9 100644 --- a/arch/arm/plat-mxc/include/mach/audmux.h +++ b/arch/arm/plat-mxc/include/mach/audmux.h | |||
@@ -15,6 +15,14 @@ | |||
15 | #define MX31_AUDMUX_PORT5_SSI_PINS_5 4 | 15 | #define MX31_AUDMUX_PORT5_SSI_PINS_5 4 |
16 | #define MX31_AUDMUX_PORT6_SSI_PINS_6 5 | 16 | #define MX31_AUDMUX_PORT6_SSI_PINS_6 5 |
17 | 17 | ||
18 | #define MX51_AUDMUX_PORT1_SSI0 0 | ||
19 | #define MX51_AUDMUX_PORT2_SSI1 1 | ||
20 | #define MX51_AUDMUX_PORT3 2 | ||
21 | #define MX51_AUDMUX_PORT4 3 | ||
22 | #define MX51_AUDMUX_PORT5 4 | ||
23 | #define MX51_AUDMUX_PORT6 5 | ||
24 | #define MX51_AUDMUX_PORT7 6 | ||
25 | |||
18 | /* Register definitions for the i.MX21/27 Digital Audio Multiplexer */ | 26 | /* Register definitions for the i.MX21/27 Digital Audio Multiplexer */ |
19 | #define MXC_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) | 27 | #define MXC_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) |
20 | #define MXC_AUDMUX_V1_PCR_INMEN (1 << 8) | 28 | #define MXC_AUDMUX_V1_PCR_INMEN (1 << 8) |
@@ -28,7 +36,7 @@ | |||
28 | #define MXC_AUDMUX_V1_PCR_TCLKDIR (1 << 30) | 36 | #define MXC_AUDMUX_V1_PCR_TCLKDIR (1 << 30) |
29 | #define MXC_AUDMUX_V1_PCR_TFSDIR (1 << 31) | 37 | #define MXC_AUDMUX_V1_PCR_TFSDIR (1 << 31) |
30 | 38 | ||
31 | /* Register definitions for the i.MX25/31/35 Digital Audio Multiplexer */ | 39 | /* Register definitions for the i.MX25/31/35/51 Digital Audio Multiplexer */ |
32 | #define MXC_AUDMUX_V2_PTCR_TFSDIR (1 << 31) | 40 | #define MXC_AUDMUX_V2_PTCR_TFSDIR (1 << 31) |
33 | #define MXC_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) | 41 | #define MXC_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) |
34 | #define MXC_AUDMUX_V2_PTCR_TCLKDIR (1 << 26) | 42 | #define MXC_AUDMUX_V2_PTCR_TCLKDIR (1 << 26) |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h index c4f116d214f2..7a9b20abda09 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h | |||
@@ -90,12 +90,12 @@ | |||
90 | #define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31) | 90 | #define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31) |
91 | #define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17) | 91 | #define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17) |
92 | #define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18) | 92 | #define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18) |
93 | #define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | 19) | 93 | #define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 19) |
94 | #define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | 20) | 94 | #define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 20) |
95 | #define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | 21) | 95 | #define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 21) |
96 | #define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | 22) | 96 | #define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 22) |
97 | #define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | 23) | 97 | #define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | GPIO_IN | 23) |
98 | #define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | 24) | 98 | #define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | GPIO_OUT | 24) |
99 | #define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25) | 99 | #define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25) |
100 | #define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26) | 100 | #define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26) |
101 | #define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27) | 101 | #define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27) |
diff --git a/arch/arm/plat-mxc/include/mach/mx50.h b/arch/arm/plat-mxc/include/mach/mx50.h index aaec2a6e7b3a..5f2da75a47f4 100644 --- a/arch/arm/plat-mxc/include/mach/mx50.h +++ b/arch/arm/plat-mxc/include/mach/mx50.h | |||
@@ -282,4 +282,8 @@ | |||
282 | #define MX50_INT_APBHDMA_CHAN6 116 | 282 | #define MX50_INT_APBHDMA_CHAN6 116 |
283 | #define MX50_INT_APBHDMA_CHAN7 117 | 283 | #define MX50_INT_APBHDMA_CHAN7 117 |
284 | 284 | ||
285 | #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) | ||
286 | extern int mx50_revision(void); | ||
287 | #endif | ||
288 | |||
285 | #endif /* ifndef __MACH_MX50_H__ */ | 289 | #endif /* ifndef __MACH_MX50_H__ */ |
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index 1eb339e6c857..dede19a766ff 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h | |||
@@ -347,6 +347,7 @@ | |||
347 | 347 | ||
348 | #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) | 348 | #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) |
349 | extern int mx51_revision(void); | 349 | extern int mx51_revision(void); |
350 | extern void mx51_display_revision(void); | ||
350 | #endif | 351 | #endif |
351 | 352 | ||
352 | /* tape-out 1 defines */ | 353 | /* tape-out 1 defines */ |
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index 7e072637eefa..1aea818d9d31 100644 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h | |||
@@ -51,6 +51,20 @@ | |||
51 | #define IMX_CHIP_REVISION_3_3 0x33 | 51 | #define IMX_CHIP_REVISION_3_3 0x33 |
52 | #define IMX_CHIP_REVISION_UNKNOWN 0xff | 52 | #define IMX_CHIP_REVISION_UNKNOWN 0xff |
53 | 53 | ||
54 | #define IMX_CHIP_REVISION_1_0_STRING "1.0" | ||
55 | #define IMX_CHIP_REVISION_1_1_STRING "1.1" | ||
56 | #define IMX_CHIP_REVISION_1_2_STRING "1.2" | ||
57 | #define IMX_CHIP_REVISION_1_3_STRING "1.3" | ||
58 | #define IMX_CHIP_REVISION_2_0_STRING "2.0" | ||
59 | #define IMX_CHIP_REVISION_2_1_STRING "2.1" | ||
60 | #define IMX_CHIP_REVISION_2_2_STRING "2.2" | ||
61 | #define IMX_CHIP_REVISION_2_3_STRING "2.3" | ||
62 | #define IMX_CHIP_REVISION_3_0_STRING "3.0" | ||
63 | #define IMX_CHIP_REVISION_3_1_STRING "3.1" | ||
64 | #define IMX_CHIP_REVISION_3_2_STRING "3.2" | ||
65 | #define IMX_CHIP_REVISION_3_3_STRING "3.3" | ||
66 | #define IMX_CHIP_REVISION_UNKNOWN_STRING "unknown" | ||
67 | |||
54 | #ifndef __ASSEMBLY__ | 68 | #ifndef __ASSEMBLY__ |
55 | extern unsigned int __mxc_cpu_type; | 69 | extern unsigned int __mxc_cpu_type; |
56 | #endif | 70 | #endif |
@@ -181,6 +195,15 @@ struct cpu_op { | |||
181 | u32 cpu_rate; | 195 | u32 cpu_rate; |
182 | }; | 196 | }; |
183 | 197 | ||
198 | int tzic_enable_wake(int is_idle); | ||
199 | enum mxc_cpu_pwr_mode { | ||
200 | WAIT_CLOCKED, /* wfi only */ | ||
201 | WAIT_UNCLOCKED, /* WAIT */ | ||
202 | WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */ | ||
203 | STOP_POWER_ON, /* just STOP */ | ||
204 | STOP_POWER_OFF, /* STOP + SRPG */ | ||
205 | }; | ||
206 | |||
184 | extern struct cpu_op *(*get_cpu_op)(int *op); | 207 | extern struct cpu_op *(*get_cpu_op)(int *op); |
185 | #endif | 208 | #endif |
186 | 209 | ||
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h index 95be51bfe9a9..0417da9f710d 100644 --- a/arch/arm/plat-mxc/include/mach/system.h +++ b/arch/arm/plat-mxc/include/mach/system.h | |||
@@ -20,6 +20,8 @@ | |||
20 | #include <mach/hardware.h> | 20 | #include <mach/hardware.h> |
21 | #include <mach/common.h> | 21 | #include <mach/common.h> |
22 | 22 | ||
23 | extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode); | ||
24 | |||
23 | static inline void arch_idle(void) | 25 | static inline void arch_idle(void) |
24 | { | 26 | { |
25 | #ifdef CONFIG_ARCH_MXC91231 | 27 | #ifdef CONFIG_ARCH_MXC91231 |
@@ -54,7 +56,9 @@ static inline void arch_idle(void) | |||
54 | "orr %0, %0, #0x00000004\n" | 56 | "orr %0, %0, #0x00000004\n" |
55 | "mcr p15, 0, %0, c1, c0, 0\n" | 57 | "mcr p15, 0, %0, c1, c0, 0\n" |
56 | : "=r" (reg)); | 58 | : "=r" (reg)); |
57 | } else | 59 | } else if (cpu_is_mx51()) |
60 | mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); | ||
61 | else | ||
58 | cpu_do_idle(); | 62 | cpu_do_idle(); |
59 | } | 63 | } |
60 | 64 | ||
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c index 9f0c2610595e..2237ff8b434f 100644 --- a/arch/arm/plat-mxc/time.c +++ b/arch/arm/plat-mxc/time.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/clk.h> | 27 | #include <linux/clk.h> |
28 | 28 | ||
29 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
30 | #include <asm/sched_clock.h> | ||
30 | #include <asm/mach/time.h> | 31 | #include <asm/mach/time.h> |
31 | #include <mach/common.h> | 32 | #include <mach/common.h> |
32 | 33 | ||
@@ -105,6 +106,11 @@ static void gpt_irq_acknowledge(void) | |||
105 | __raw_writel(V2_TSTAT_OF1, timer_base + V2_TSTAT); | 106 | __raw_writel(V2_TSTAT_OF1, timer_base + V2_TSTAT); |
106 | } | 107 | } |
107 | 108 | ||
109 | static cycle_t dummy_get_cycles(struct clocksource *cs) | ||
110 | { | ||
111 | return 0; | ||
112 | } | ||
113 | |||
108 | static cycle_t mx1_2_get_cycles(struct clocksource *cs) | 114 | static cycle_t mx1_2_get_cycles(struct clocksource *cs) |
109 | { | 115 | { |
110 | return __raw_readl(timer_base + MX1_2_TCN); | 116 | return __raw_readl(timer_base + MX1_2_TCN); |
@@ -118,18 +124,35 @@ static cycle_t v2_get_cycles(struct clocksource *cs) | |||
118 | static struct clocksource clocksource_mxc = { | 124 | static struct clocksource clocksource_mxc = { |
119 | .name = "mxc_timer1", | 125 | .name = "mxc_timer1", |
120 | .rating = 200, | 126 | .rating = 200, |
121 | .read = mx1_2_get_cycles, | 127 | .read = dummy_get_cycles, |
122 | .mask = CLOCKSOURCE_MASK(32), | 128 | .mask = CLOCKSOURCE_MASK(32), |
123 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 129 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
124 | }; | 130 | }; |
125 | 131 | ||
132 | static DEFINE_CLOCK_DATA(cd); | ||
133 | unsigned long long notrace sched_clock(void) | ||
134 | { | ||
135 | cycle_t cyc = clocksource_mxc.read(&clocksource_mxc); | ||
136 | |||
137 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
138 | } | ||
139 | |||
140 | static void notrace mxc_update_sched_clock(void) | ||
141 | { | ||
142 | cycle_t cyc = clocksource_mxc.read(&clocksource_mxc); | ||
143 | update_sched_clock(&cd, cyc, (u32)~0); | ||
144 | } | ||
145 | |||
126 | static int __init mxc_clocksource_init(struct clk *timer_clk) | 146 | static int __init mxc_clocksource_init(struct clk *timer_clk) |
127 | { | 147 | { |
128 | unsigned int c = clk_get_rate(timer_clk); | 148 | unsigned int c = clk_get_rate(timer_clk); |
129 | 149 | ||
130 | if (timer_is_v2()) | 150 | if (timer_is_v2()) |
131 | clocksource_mxc.read = v2_get_cycles; | 151 | clocksource_mxc.read = v2_get_cycles; |
152 | else | ||
153 | clocksource_mxc.read = mx1_2_get_cycles; | ||
132 | 154 | ||
155 | init_sched_clock(&cd, mxc_update_sched_clock, 32, c); | ||
133 | clocksource_register_hz(&clocksource_mxc, c); | 156 | clocksource_register_hz(&clocksource_mxc, c); |
134 | 157 | ||
135 | return 0; | 158 | return 0; |