diff options
author | Wolfram Sang <w.sang@pengutronix.de> | 2011-03-10 14:55:04 -0500 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2011-05-19 07:11:09 -0400 |
commit | 986e5f08de25050e893411aef56776d84d3530b6 (patch) | |
tree | 5ccdaa224f8d07935ebf351139a3faa2d9fd2d31 /arch/arm/plat-mxc | |
parent | f4bf03d8b7fbd3e2d38d895a89c53df039976fd0 (diff) |
ARM: mx27: fix gpt4/5 base address
Reported-by: Igor Trevisan <igt1972@gmail.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
LAKML-Reference: 1299786904-5494-1-git-send-email-w.sang@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mx27.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h index cbc43ad5ef48..1dc1c522601b 100644 --- a/arch/arm/plat-mxc/include/mach/mx27.h +++ b/arch/arm/plat-mxc/include/mach/mx27.h | |||
@@ -60,8 +60,8 @@ | |||
60 | #define MX27_AUDMUX_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x16000) | 60 | #define MX27_AUDMUX_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x16000) |
61 | #define MX27_CSPI3_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x17000) | 61 | #define MX27_CSPI3_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x17000) |
62 | #define MX27_MSHC_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x18000) | 62 | #define MX27_MSHC_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x18000) |
63 | #define MX27_GPT5_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x19000) | 63 | #define MX27_GPT4_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x19000) |
64 | #define MX27_GPT4_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x1a000) | 64 | #define MX27_GPT5_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x1a000) |
65 | #define MX27_UART5_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x1b000) | 65 | #define MX27_UART5_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x1b000) |
66 | #define MX27_UART6_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x1c000) | 66 | #define MX27_UART6_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x1c000) |
67 | #define MX27_I2C2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x1d000) | 67 | #define MX27_I2C2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x1d000) |