Merge branch 'origin' into devel-stable

Conflicts:
	arch/arm/mach-mx2/devices.c
	arch/arm/mach-mx2/devices.h
	sound/soc/pxa/pxa-ssp.c

6 files changed, 198 insertions, 2 deletions

diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index a72a5e4ca20e..895bc3c5e0c0 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -17,3 +17,7 @@ obj-$(CONFIG_USB_EHCI_MXC) += ehci.o
 obj-$(CONFIG_MXC_ULPI) += ulpi.o
 obj-$(CONFIG_ARCH_MXC_AUDMUX_V1) += audmux-v1.o
 obj-$(CONFIG_ARCH_MXC_AUDMUX_V2) += audmux-v2.o
+ifdef CONFIG_SND_IMX_SOC
+obj-y += ssi-fiq.o
+obj-y += ssi-fiq-ksym.o
+endif
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index 133d66bfb533..0b6e11eaeb8c 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -62,7 +62,7 @@
 #define UART_PADDR      MXC91231_UART2_BASE_ADDR
 #define UART_VADDR      MXC91231_IO_ADDRESS(MXC91231_UART2_BASE_ADDR)
 #endif
-                .macro  addruart,rx
+                .macro  addruart, rx, tmp
                 mrc     p15, 0, \rx, c1, c0
                 tst     \rx, #1                 @ MMU enabled?
                 ldreq   \rx, =UART_PADDR        @ physical
diff --git a/arch/arm/plat-mxc/include/mach/mx21-usbhost.h b/arch/arm/plat-mxc/include/mach/mx21-usbhost.h
new file mode 100644
index 000000000000..22d0b596262c
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/mx21-usbhost.h
@@ -0,0 +1,38 @@
+/*
+ *      Copyright (C) 2009 Martin Fuzzey <mfuzzey@gmail.com>
+ *
+ *      This program is free software; you can redistribute it and/or modify
+ *      it under the terms of the GNU General Public License as published by
+ *      the Free Software Foundation; either version 2 of the License, or
+ *      (at your option) any later version.
+ *
+ *      This program is distributed in the hope that it will be useful,
+ *      but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *      GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_MX21_USBH
+#define __ASM_ARCH_MX21_USBH
+
+enum mx21_usbh_xcvr {
+        /* Values below as used by hardware (HWMODE register) */
+        MX21_USBXCVR_TXDIF_RXDIF = 0,
+        MX21_USBXCVR_TXDIF_RXSE = 1,
+        MX21_USBXCVR_TXSE_RXDIF = 2,
+        MX21_USBXCVR_TXSE_RXSE = 3,
+};
+
+struct mx21_usbh_platform_data {
+        enum mx21_usbh_xcvr host_xcvr; /* tranceiver mode host 1,2 ports */
+        enum mx21_usbh_xcvr otg_xcvr; /* tranceiver mode otg (as host) port */
+        u16     enable_host1:1,
+                enable_host2:1,
+                enable_otg_host:1, /* enable "OTG" port (as host) */
+                host1_xcverless:1, /* traceiverless host1 port */
+                host1_txenoe:1, /* output enable host1 transmit enable */
+                otg_ext_xcvr:1, /* external tranceiver for OTG port */
+                unused:10;
+};
+
+#endif /* __ASM_ARCH_MX21_USBH */
diff --git a/arch/arm/plat-mxc/include/mach/vmalloc.h b/arch/arm/plat-mxc/include/mach/vmalloc.h
index 62d97623412f..44243a278434 100644
--- a/arch/arm/plat-mxc/include/mach/vmalloc.h
+++ b/arch/arm/plat-mxc/include/mach/vmalloc.h
@@ -21,6 +21,6 @@
 #define __ASM_ARCH_MXC_VMALLOC_H__
 
 /* vmalloc ending address */
-#define VMALLOC_END       0xF4000000
+#define VMALLOC_END       0xf4000000UL
 
 #endif /* __ASM_ARCH_MXC_VMALLOC_H__ */
diff --git a/arch/arm/plat-mxc/ssi-fiq-ksym.c b/arch/arm/plat-mxc/ssi-fiq-ksym.c
new file mode 100644
index 000000000000..b5fad454da78
--- /dev/null
+++ b/arch/arm/plat-mxc/ssi-fiq-ksym.c
@@ -0,0 +1,20 @@
+/*
+ * Exported ksyms for the SSI FIQ handler
+ *
+ * Copyright (C) 2009, Sascha Hauer <s.hauer@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+
+#include <mach/ssi.h>
+
+EXPORT_SYMBOL(imx_ssi_fiq_tx_buffer);
+EXPORT_SYMBOL(imx_ssi_fiq_rx_buffer);
+EXPORT_SYMBOL(imx_ssi_fiq_start);
+EXPORT_SYMBOL(imx_ssi_fiq_end);
+EXPORT_SYMBOL(imx_ssi_fiq_base);
+
diff --git a/arch/arm/plat-mxc/ssi-fiq.S b/arch/arm/plat-mxc/ssi-fiq.S
new file mode 100644
index 000000000000..4ddce565b353
--- /dev/null
+++ b/arch/arm/plat-mxc/ssi-fiq.S
@@ -0,0 +1,134 @@
+/*
+ *  Copyright (C) 2009 Sascha Hauer <s.hauer@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+/*
+ * r8  = bit 0-15: tx offset, bit 16-31: tx buffer size
+ * r9  = bit 0-15: rx offset, bit 16-31: rx buffer size
+ */
+
+#define SSI_STX0        0x00
+#define SSI_SRX0        0x08
+#define SSI_SISR        0x14
+#define SSI_SIER        0x18
+#define SSI_SACNT       0x38
+
+#define SSI_SACNT_AC97EN        (1 << 0)
+
+#define SSI_SIER_TFE0_EN        (1 << 0)
+#define SSI_SISR_TFE0           (1 << 0)
+#define SSI_SISR_RFF0           (1 << 2)
+#define SSI_SIER_RFF0_EN        (1 << 2)
+
+                .text
+                .global imx_ssi_fiq_start
+                .global imx_ssi_fiq_end
+                .global imx_ssi_fiq_base
+                .global imx_ssi_fiq_rx_buffer
+                .global imx_ssi_fiq_tx_buffer
+
+imx_ssi_fiq_start:
+                ldr r12, imx_ssi_fiq_base
+
+                /* TX */
+                ldr r11, imx_ssi_fiq_tx_buffer
+
+                /* shall we send? */
+                ldr r13, [r12, #SSI_SIER]
+                tst r13, #SSI_SIER_TFE0_EN
+                beq 1f
+
+                /* TX FIFO empty? */
+                ldr r13, [r12, #SSI_SISR]
+                tst r13, #SSI_SISR_TFE0
+                beq 1f
+
+                mov r10, #0x10000
+                sub r10, #1
+                and r10, r10, r8        /* r10: current buffer offset */
+
+                add r11, r11, r10
+
+                ldrh r13, [r11]
+                strh r13, [r12, #SSI_STX0]
+
+                ldrh r13, [r11, #2]
+                strh r13, [r12, #SSI_STX0]
+
+                ldrh r13, [r11, #4]
+                strh r13, [r12, #SSI_STX0]
+
+                ldrh r13, [r11, #6]
+                strh r13, [r12, #SSI_STX0]
+
+                add r10, #8
+                lsr r13, r8, #16        /* r13: buffer size */
+                cmp r10, r13
+                lslgt r8, r13, #16
+                addle r8, #8
+1:
+                /* RX */
+
+                /* shall we receive? */
+                ldr r13, [r12, #SSI_SIER]
+                tst r13, #SSI_SIER_RFF0_EN
+                beq 1f
+
+                /* RX FIFO full? */
+                ldr r13, [r12, #SSI_SISR]
+                tst r13, #SSI_SISR_RFF0
+                beq 1f
+
+                ldr r11, imx_ssi_fiq_rx_buffer
+
+                mov r10, #0x10000
+                sub r10, #1
+                and r10, r10, r9        /* r10: current buffer offset */
+
+                add r11, r11, r10
+
+                ldr r13, [r12, #SSI_SACNT]
+                tst r13, #SSI_SACNT_AC97EN
+
+                ldr r13, [r12, #SSI_SRX0]
+                strh r13, [r11]
+
+                ldr r13, [r12, #SSI_SRX0]
+                strh r13, [r11, #2]
+
+                /* dummy read to skip slot 12 */
+                ldrne r13, [r12, #SSI_SRX0]
+
+                ldr r13, [r12, #SSI_SRX0]
+                strh r13, [r11, #4]
+
+                ldr r13, [r12, #SSI_SRX0]
+                strh r13, [r11, #6]
+
+                /* dummy read to skip slot 12 */
+                ldrne r13, [r12, #SSI_SRX0]
+
+                add r10, #8
+                lsr r13, r9, #16        /* r13: buffer size */
+                cmp r10, r13
+                lslgt r9, r13, #16
+                addle r9, #8
+
+1:
+                @ return from FIQ
+                subs    pc, lr, #4
+imx_ssi_fiq_base:
+                .word 0x0
+imx_ssi_fiq_rx_buffer:
+                .word 0x0
+imx_ssi_fiq_tx_buffer:
+                .word 0x0
+imx_ssi_fiq_end:
+