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authorLinus Torvalds <torvalds@linux-foundation.org>2010-10-30 11:26:25 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-10-30 11:26:25 -0400
commit706d4b12f8d7edd28d7e879a77235472da393edb (patch)
treec9bc1ce06b1154a49da1d0d907cac544a818eb0e /arch/arm/plat-mxc
parent3af54c9bd9e6f14f896aac1bb0e8405ae0bc7a44 (diff)
parent9bafc74163d8bccca9810159aab39be926fb877c (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (215 commits) ARM: memblock: setup lowmem mappings using memblock ARM: memblock: move meminfo into find_limits directly ARM: memblock: convert free_highpages() to use memblock ARM: move freeing of highmem pages out of mem_init() ARM: memblock: convert memory detail printing to use memblock ARM: memblock: use memblock to free memory into arm_bootmem_init() ARM: memblock: use memblock when initializing memory allocators ARM: ensure membank array is always sorted ARM: 6466/1: implement flush_icache_all for the rest of the CPUs ARM: 6464/2: fix spinlock recursion in adjust_pte() ARM: fix memblock breakage ARM: 6465/1: Fix data abort accessing proc_info from __lookup_processor_type ARM: 6460/1: ixp2000: fix type of ixp2000_timer_interrupt ARM: 6449/1: Fix for compiler warning of uninitialized variable. ARM: 6445/1: fixup TCM memory types ARM: imx: Add wake functionality to GPIO ARM: mx5: Add gpio-keys to mx51 babbage board ARM: imx: Add gpio-keys to plat-mxc mx31_3ds: Fix spi registration mx31_3ds: Fix the logic for detecting the debug board ...
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r--arch/arm/plat-mxc/Makefile1
-rw-r--r--arch/arm/plat-mxc/cpufreq.c206
-rw-r--r--arch/arm/plat-mxc/devices/Kconfig6
-rw-r--r--arch/arm/plat-mxc/devices/Makefile1
-rw-r--r--arch/arm/plat-mxc/devices/platform-gpio_keys.c27
-rw-r--r--arch/arm/plat-mxc/gpio.c32
-rw-r--r--arch/arm/plat-mxc/include/mach/devices-common.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx51.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/mx31.h1
-rw-r--r--arch/arm/plat-mxc/include/mach/mx35.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc.h13
11 files changed, 290 insertions, 5 deletions
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index 06875b4dd70f..372670952789 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_MXC_USE_EPIT) += epit.o
18obj-$(CONFIG_ARCH_MXC_AUDMUX_V1) += audmux-v1.o 18obj-$(CONFIG_ARCH_MXC_AUDMUX_V1) += audmux-v1.o
19obj-$(CONFIG_ARCH_MXC_AUDMUX_V2) += audmux-v2.o 19obj-$(CONFIG_ARCH_MXC_AUDMUX_V2) += audmux-v2.o
20obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o 20obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
21obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o
21ifdef CONFIG_SND_IMX_SOC 22ifdef CONFIG_SND_IMX_SOC
22obj-y += ssi-fiq.o 23obj-y += ssi-fiq.o
23obj-y += ssi-fiq-ksym.o 24obj-y += ssi-fiq-ksym.o
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c
new file mode 100644
index 000000000000..039538e68793
--- /dev/null
+++ b/arch/arm/plat-mxc/cpufreq.c
@@ -0,0 +1,206 @@
1/*
2 * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/*
15 * A driver for the Freescale Semiconductor i.MXC CPUfreq module.
16 * The CPUFREQ driver is for controling CPU frequency. It allows you to change
17 * the CPU clock speed on the fly.
18 */
19
20#include <linux/cpufreq.h>
21#include <linux/clk.h>
22#include <linux/err.h>
23#include <linux/slab.h>
24#include <mach/hardware.h>
25#include <mach/clock.h>
26
27#define CLK32_FREQ 32768
28#define NANOSECOND (1000 * 1000 * 1000)
29
30struct cpu_op *(*get_cpu_op)(int *op);
31
32static int cpu_freq_khz_min;
33static int cpu_freq_khz_max;
34
35static struct clk *cpu_clk;
36static struct cpufreq_frequency_table *imx_freq_table;
37
38static int cpu_op_nr;
39static struct cpu_op *cpu_op_tbl;
40
41static int set_cpu_freq(int freq)
42{
43 int ret = 0;
44 int org_cpu_rate;
45
46 org_cpu_rate = clk_get_rate(cpu_clk);
47 if (org_cpu_rate == freq)
48 return ret;
49
50 ret = clk_set_rate(cpu_clk, freq);
51 if (ret != 0) {
52 printk(KERN_DEBUG "cannot set CPU clock rate\n");
53 return ret;
54 }
55
56 return ret;
57}
58
59static int mxc_verify_speed(struct cpufreq_policy *policy)
60{
61 if (policy->cpu != 0)
62 return -EINVAL;
63
64 return cpufreq_frequency_table_verify(policy, imx_freq_table);
65}
66
67static unsigned int mxc_get_speed(unsigned int cpu)
68{
69 if (cpu)
70 return 0;
71
72 return clk_get_rate(cpu_clk) / 1000;
73}
74
75static int mxc_set_target(struct cpufreq_policy *policy,
76 unsigned int target_freq, unsigned int relation)
77{
78 struct cpufreq_freqs freqs;
79 int freq_Hz;
80 int ret = 0;
81 unsigned int index;
82
83 cpufreq_frequency_table_target(policy, imx_freq_table,
84 target_freq, relation, &index);
85 freq_Hz = imx_freq_table[index].frequency * 1000;
86
87 freqs.old = clk_get_rate(cpu_clk) / 1000;
88 freqs.new = freq_Hz / 1000;
89 freqs.cpu = 0;
90 freqs.flags = 0;
91 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
92
93 ret = set_cpu_freq(freq_Hz);
94
95 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
96
97 return ret;
98}
99
100static int __init mxc_cpufreq_init(struct cpufreq_policy *policy)
101{
102 int ret;
103 int i;
104
105 printk(KERN_INFO "i.MXC CPU frequency driver\n");
106
107 if (policy->cpu != 0)
108 return -EINVAL;
109
110 if (!get_cpu_op)
111 return -EINVAL;
112
113 cpu_clk = clk_get(NULL, "cpu_clk");
114 if (IS_ERR(cpu_clk)) {
115 printk(KERN_ERR "%s: failed to get cpu clock\n", __func__);
116 return PTR_ERR(cpu_clk);
117 }
118
119 cpu_op_tbl = get_cpu_op(&cpu_op_nr);
120
121 cpu_freq_khz_min = cpu_op_tbl[0].cpu_rate / 1000;
122 cpu_freq_khz_max = cpu_op_tbl[0].cpu_rate / 1000;
123
124 imx_freq_table = kmalloc(
125 sizeof(struct cpufreq_frequency_table) * (cpu_op_nr + 1),
126 GFP_KERNEL);
127 if (!imx_freq_table) {
128 ret = -ENOMEM;
129 goto err1;
130 }
131
132 for (i = 0; i < cpu_op_nr; i++) {
133 imx_freq_table[i].index = i;
134 imx_freq_table[i].frequency = cpu_op_tbl[i].cpu_rate / 1000;
135
136 if ((cpu_op_tbl[i].cpu_rate / 1000) < cpu_freq_khz_min)
137 cpu_freq_khz_min = cpu_op_tbl[i].cpu_rate / 1000;
138
139 if ((cpu_op_tbl[i].cpu_rate / 1000) > cpu_freq_khz_max)
140 cpu_freq_khz_max = cpu_op_tbl[i].cpu_rate / 1000;
141 }
142
143 imx_freq_table[i].index = i;
144 imx_freq_table[i].frequency = CPUFREQ_TABLE_END;
145
146 policy->cur = clk_get_rate(cpu_clk) / 1000;
147 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
148 policy->min = policy->cpuinfo.min_freq = cpu_freq_khz_min;
149 policy->max = policy->cpuinfo.max_freq = cpu_freq_khz_max;
150
151 /* Manual states, that PLL stabilizes in two CLK32 periods */
152 policy->cpuinfo.transition_latency = 2 * NANOSECOND / CLK32_FREQ;
153
154 ret = cpufreq_frequency_table_cpuinfo(policy, imx_freq_table);
155
156 if (ret < 0) {
157 printk(KERN_ERR "%s: failed to register i.MXC CPUfreq \
158 with error code %d\n", __func__, ret);
159 goto err;
160 }
161
162 cpufreq_frequency_table_get_attr(imx_freq_table, policy->cpu);
163 return 0;
164err:
165 kfree(imx_freq_table);
166err1:
167 clk_put(cpu_clk);
168 return ret;
169}
170
171static int mxc_cpufreq_exit(struct cpufreq_policy *policy)
172{
173 cpufreq_frequency_table_put_attr(policy->cpu);
174
175 set_cpu_freq(cpu_freq_khz_max * 1000);
176 clk_put(cpu_clk);
177 kfree(imx_freq_table);
178 return 0;
179}
180
181static struct cpufreq_driver mxc_driver = {
182 .flags = CPUFREQ_STICKY,
183 .verify = mxc_verify_speed,
184 .target = mxc_set_target,
185 .get = mxc_get_speed,
186 .init = mxc_cpufreq_init,
187 .exit = mxc_cpufreq_exit,
188 .name = "imx",
189};
190
191static int __devinit mxc_cpufreq_driver_init(void)
192{
193 return cpufreq_register_driver(&mxc_driver);
194}
195
196static void mxc_cpufreq_driver_exit(void)
197{
198 cpufreq_unregister_driver(&mxc_driver);
199}
200
201module_init(mxc_cpufreq_driver_init);
202module_exit(mxc_cpufreq_driver_exit);
203
204MODULE_AUTHOR("Freescale Semiconductor Inc. Yong Shen <yong.shen@linaro.org>");
205MODULE_DESCRIPTION("CPUfreq driver for i.MX");
206MODULE_LICENSE("GPL");
diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig
index 404799487f17..9aa6f3ea9012 100644
--- a/arch/arm/plat-mxc/devices/Kconfig
+++ b/arch/arm/plat-mxc/devices/Kconfig
@@ -6,9 +6,13 @@ config IMX_HAVE_PLATFORM_FEC
6 default y if ARCH_MX25 || SOC_IMX27 || ARCH_MX35 || ARCH_MX51 6 default y if ARCH_MX25 || SOC_IMX27 || ARCH_MX35 || ARCH_MX51
7 7
8config IMX_HAVE_PLATFORM_FLEXCAN 8config IMX_HAVE_PLATFORM_FLEXCAN
9 select HAVE_CAN_FLEXCAN 9 select HAVE_CAN_FLEXCAN if CAN
10 bool 10 bool
11 11
12config IMX_HAVE_PLATFORM_GPIO_KEYS
13 bool
14 default y if ARCH_MX51
15
12config IMX_HAVE_PLATFORM_IMX_I2C 16config IMX_HAVE_PLATFORM_IMX_I2C
13 bool 17 bool
14 18
diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile
index 0a3c1f089413..45aefeb283ba 100644
--- a/arch/arm/plat-mxc/devices/Makefile
+++ b/arch/arm/plat-mxc/devices/Makefile
@@ -1,6 +1,7 @@
1obj-$(CONFIG_IMX_HAVE_PLATFORM_ESDHC) += platform-esdhc.o 1obj-$(CONFIG_IMX_HAVE_PLATFORM_ESDHC) += platform-esdhc.o
2obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o 2obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o
3obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o 3obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
4obj-$(CONFIG_IMX_HAVE_PLATFORM_GPIO_KEYS) += platform-gpio_keys.o
4obj-y += platform-imx-dma.o 5obj-y += platform-imx-dma.o
5obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o 6obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o
6obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o 7obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o
diff --git a/arch/arm/plat-mxc/devices/platform-gpio_keys.c b/arch/arm/plat-mxc/devices/platform-gpio_keys.c
new file mode 100644
index 000000000000..1c53a532ea0e
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-gpio_keys.c
@@ -0,0 +1,27 @@
1/*
2 * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin Street, Fifth Floor,
16 * Boston, MA 02110-1301, USA.
17 */
18#include <asm/sizes.h>
19#include <mach/hardware.h>
20#include <mach/devices-common.h>
21
22struct platform_device *__init imx_add_gpio_keys(
23 const struct gpio_keys_platform_data *pdata)
24{
25 return imx_add_platform_device("gpio-keys", -1, NULL,
26 0, pdata, sizeof(*pdata));
27}
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
index 9d38da077edb..9c3e36232b5b 100644
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -20,6 +20,7 @@
20 */ 20 */
21 21
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/interrupt.h>
23#include <linux/io.h> 24#include <linux/io.h>
24#include <linux/irq.h> 25#include <linux/irq.h>
25#include <linux/gpio.h> 26#include <linux/gpio.h>
@@ -201,11 +202,42 @@ static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc)
201 } 202 }
202} 203}
203 204
205/*
206 * Set interrupt number "irq" in the GPIO as a wake-up source.
207 * While system is running, all registered GPIO interrupts need to have
208 * wake-up enabled. When system is suspended, only selected GPIO interrupts
209 * need to have wake-up enabled.
210 * @param irq interrupt source number
211 * @param enable enable as wake-up if equal to non-zero
212 * @return This function returns 0 on success.
213 */
214static int gpio_set_wake_irq(u32 irq, u32 enable)
215{
216 u32 gpio = irq_to_gpio(irq);
217 u32 gpio_idx = gpio & 0x1F;
218 struct mxc_gpio_port *port = &mxc_gpio_ports[gpio / 32];
219
220 if (enable) {
221 if (port->irq_high && (gpio_idx >= 16))
222 enable_irq_wake(port->irq_high);
223 else
224 enable_irq_wake(port->irq);
225 } else {
226 if (port->irq_high && (gpio_idx >= 16))
227 disable_irq_wake(port->irq_high);
228 else
229 disable_irq_wake(port->irq);
230 }
231
232 return 0;
233}
234
204static struct irq_chip gpio_irq_chip = { 235static struct irq_chip gpio_irq_chip = {
205 .ack = gpio_ack_irq, 236 .ack = gpio_ack_irq,
206 .mask = gpio_mask_irq, 237 .mask = gpio_mask_irq,
207 .unmask = gpio_unmask_irq, 238 .unmask = gpio_unmask_irq,
208 .set_type = gpio_set_irq_type, 239 .set_type = gpio_set_irq_type,
240 .set_wake = gpio_set_wake_irq,
209}; 241};
210 242
211static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, 243static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset,
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h
index 86d7575a564d..8c6896fd1e5f 100644
--- a/arch/arm/plat-mxc/include/mach/devices-common.h
+++ b/arch/arm/plat-mxc/include/mach/devices-common.h
@@ -29,6 +29,10 @@ struct platform_device *__init imx_add_flexcan(int id,
29 resource_size_t irq, 29 resource_size_t irq,
30 const struct flexcan_platform_data *pdata); 30 const struct flexcan_platform_data *pdata);
31 31
32#include <linux/gpio_keys.h>
33struct platform_device *__init imx_add_gpio_keys(
34 const struct gpio_keys_platform_data *pdata);
35
32#include <mach/i2c.h> 36#include <mach/i2c.h>
33struct imx_imx_i2c_data { 37struct imx_imx_i2c_data {
34 int id; 38 int id;
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h
index e46b1c2836d4..d7a41e9a2605 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx51.h
@@ -45,6 +45,8 @@ typedef enum iomux_config {
45 PAD_CTL_PKE | PAD_CTL_HYS) 45 PAD_CTL_PKE | PAD_CTL_HYS)
46#define MX51_GPIO_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PKE | \ 46#define MX51_GPIO_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PKE | \
47 PAD_CTL_SRE_FAST) 47 PAD_CTL_SRE_FAST)
48#define MX51_GPIO_PAD_CTRL_2 (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \
49 PAD_CTL_PUS_100K_UP)
48#define MX51_ECSPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_DSE_HIGH | \ 50#define MX51_ECSPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_DSE_HIGH | \
49 PAD_CTL_SRE_FAST) 51 PAD_CTL_SRE_FAST)
50#define MX51_SDHCI_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PUS_47K_UP | \ 52#define MX51_SDHCI_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PUS_47K_UP | \
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index 03e2afabc9fc..61cfe827498b 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -240,7 +240,6 @@ static inline void mx31_setup_weimcs(size_t cs,
240#define MPEG4_ENC_BASE_ADDR MX31_MPEG4_ENC_BASE_ADDR 240#define MPEG4_ENC_BASE_ADDR MX31_MPEG4_ENC_BASE_ADDR
241#define MXC_INT_MPEG4_ENCODER MX31_INT_MPEG4_ENCODER 241#define MXC_INT_MPEG4_ENCODER MX31_INT_MPEG4_ENCODER
242#define MXC_INT_FIRI MX31_INT_FIRI 242#define MXC_INT_FIRI MX31_INT_FIRI
243#define MXC_INT_MMC_SDHC1 MX31_INT_MMC_SDHC1
244#define MXC_INT_MBX MX31_INT_MBX 243#define MXC_INT_MBX MX31_INT_MBX
245#define MXC_INT_CSPI3 MX31_INT_CSPI3 244#define MXC_INT_CSPI3 MX31_INT_CSPI3
246#define MXC_INT_SIM2 MX31_INT_SIM2 245#define MXC_INT_SIM2 MX31_INT_SIM2
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index ff905cb32458..6267cff6035d 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -197,8 +197,6 @@
197/* these should go away */ 197/* these should go away */
198#define MXC_FEC_BASE_ADDR MX35_FEC_BASE_ADDR 198#define MXC_FEC_BASE_ADDR MX35_FEC_BASE_ADDR
199#define MXC_INT_OWIRE MX35_INT_OWIRE 199#define MXC_INT_OWIRE MX35_INT_OWIRE
200#define MXC_INT_MMC_SDHC2 MX35_INT_MMC_SDHC2
201#define MXC_INT_MMC_SDHC3 MX35_INT_MMC_SDHC3
202#define MXC_INT_GPU2D MX35_INT_GPU2D 200#define MXC_INT_GPU2D MX35_INT_GPU2D
203#define MXC_INT_ASRC MX35_INT_ASRC 201#define MXC_INT_ASRC MX35_INT_ASRC
204#define MXC_INT_USBHS MX35_INT_USBHS 202#define MXC_INT_USBHS MX35_INT_USBHS
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index a790bf212972..a42c7207082d 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. 2 * Copyright 2004-2007, 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) 3 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
4 * 4 *
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
@@ -20,6 +20,8 @@
20#ifndef __ASM_ARCH_MXC_H__ 20#ifndef __ASM_ARCH_MXC_H__
21#define __ASM_ARCH_MXC_H__ 21#define __ASM_ARCH_MXC_H__
22 22
23#include <linux/types.h>
24
23#ifndef __ASM_ARCH_MXC_HARDWARE_H__ 25#ifndef __ASM_ARCH_MXC_HARDWARE_H__
24#error "Do not include directly." 26#error "Do not include directly."
25#endif 27#endif
@@ -133,6 +135,15 @@ extern unsigned int __mxc_cpu_type;
133# define cpu_is_mxc91231() (0) 135# define cpu_is_mxc91231() (0)
134#endif 136#endif
135 137
138#ifndef __ASSEMBLY__
139
140struct cpu_op {
141 u32 cpu_rate;
142};
143
144extern struct cpu_op *(*get_cpu_op)(int *op);
145#endif
146
136#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2) 147#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2)
137/* These are deprecated, use mx[23][157]_setup_weimcs instead. */ 148/* These are deprecated, use mx[23][157]_setup_weimcs instead. */
138#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10)) 149#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10))