ARM i.MX53 enable sdhc support on EVK board

1. changes some register address to fit macro definition
2. add platform data and clock for sdhc

Signed-off-by: Yong Shen <yong.shen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

2 files changed, 20 insertions, 8 deletions

diff --git a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c b/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
index b3525648a01d..6b2940b93d94 100644
--- a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
+++ b/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
@@ -53,6 +53,18 @@ imx51_sdhci_esdhc_imx_data[] __initconst = {
 };
 #endif /* ifdef CONFIG_SOC_IMX51 */
 
+#ifdef CONFIG_SOC_IMX53
+const struct imx_sdhci_esdhc_imx_data
+imx53_sdhci_esdhc_imx_data[] __initconst = {
+#define imx53_sdhci_esdhc_imx_data_entry(_id, _hwid)                    \
+        imx_sdhci_esdhc_imx_data_entry(MX53, _id, _hwid)
+        imx53_sdhci_esdhc_imx_data_entry(0, 1),
+        imx53_sdhci_esdhc_imx_data_entry(1, 2),
+        imx53_sdhci_esdhc_imx_data_entry(2, 3),
+        imx53_sdhci_esdhc_imx_data_entry(3, 4),
+};
+#endif /* ifdef CONFIG_SOC_IMX53 */
+
 struct platform_device *__init imx_add_sdhci_esdhc_imx(
                 const struct imx_sdhci_esdhc_imx_data *data,
                 const struct esdhc_platform_data *pdata)
diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h
index a35e0c79bf23..340937f94e6f 100644
--- a/arch/arm/plat-mxc/include/mach/mx53.h
+++ b/arch/arm/plat-mxc/include/mach/mx53.h
@@ -53,13 +53,13 @@
 #define MX53_SPBA0_BASE_ADDR            0x50000000
 #define MX53_SPBA0_SIZE         SZ_1M
 
-#define MX53_MMC_SDHC1_BASE_ADDR        (MX53_SPBA0_BASE_ADDR + 0x00004000)
-#define MX53_MMC_SDHC2_BASE_ADDR        (MX53_SPBA0_BASE_ADDR + 0x00008000)
+#define MX53_ESDHC1_BASE_ADDR   (MX53_SPBA0_BASE_ADDR + 0x00004000)
+#define MX53_ESDHC2_BASE_ADDR   (MX53_SPBA0_BASE_ADDR + 0x00008000)
 #define MX53_UART3_BASE_ADDR            (MX53_SPBA0_BASE_ADDR + 0x0000C000)
 #define MX53_CSPI1_BASE_ADDR            (MX53_SPBA0_BASE_ADDR + 0x00010000)
 #define MX53_SSI2_BASE_ADDR             (MX53_SPBA0_BASE_ADDR + 0x00014000)
-#define MX53_MMC_SDHC3_BASE_ADDR        (MX53_SPBA0_BASE_ADDR + 0x00020000)
-#define MX53_MMC_SDHC4_BASE_ADDR        (MX53_SPBA0_BASE_ADDR + 0x00024000)
+#define MX53_ESDHC3_BASE_ADDR   (MX53_SPBA0_BASE_ADDR + 0x00020000)
+#define MX53_ESDHC4_BASE_ADDR   (MX53_SPBA0_BASE_ADDR + 0x00024000)
 #define MX53_SPDIF_BASE_ADDR            (MX53_SPBA0_BASE_ADDR + 0x00028000)
 #define MX53_ASRC_BASE_ADDR             (MX53_SPBA0_BASE_ADDR + 0x0002C000)
 #define MX53_ATA_DMA_BASE_ADDR  (MX53_SPBA0_BASE_ADDR + 0x00030000)
@@ -229,10 +229,10 @@
  * Interrupt numbers
  */
 #define MX53_INT_RESV0          0
-#define MX53_INT_MMC_SDHC1      1
-#define MX53_INT_MMC_SDHC2      2
-#define MX53_INT_MMC_SDHC3      3
-#define MX53_INT_MMC_SDHC4      4
+#define MX53_INT_ESDHC1 1
+#define MX53_INT_ESDHC2 2
+#define MX53_INT_ESDHC3 3
+#define MX53_INT_ESDHC4 4
 #define MX53_INT_RESV5  5
 #define MX53_INT_SDMA   6
 #define MX53_INT_IOMUX  7