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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-01-14 07:12:42 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-01-14 07:12:42 -0500
commit0a831cec1b627d2f3f60c6f70a4c649b7caa4fe2 (patch)
treec2ab5e6d5ff4def2ffafe2cd61ac14aedb5a86e7 /arch/arm/plat-mxc
parent5b88128fd70dcf0d5d7c0ae7d7849777ff925bde (diff)
parentb9214b9780d6897a6892e7c8cc903168d6fef097 (diff)
Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6 into devel-stable
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r--arch/arm/plat-mxc/devices/Kconfig2
-rw-r--r--arch/arm/plat-mxc/devices/platform-fec.c5
-rw-r--r--arch/arm/plat-mxc/devices/platform-imx-i2c.c9
-rw-r--r--arch/arm/plat-mxc/devices/platform-imx-keypad.c5
-rw-r--r--arch/arm/plat-mxc/devices/platform-mxc_pwm.c9
-rw-r--r--arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c12
-rw-r--r--arch/arm/plat-mxc/devices/platform-spi_imx.c12
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx53.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-v3.h1
-rw-r--r--arch/arm/plat-mxc/include/mach/mx51.h6
-rw-r--r--arch/arm/plat-mxc/include/mach/mx53.h28
-rw-r--r--arch/arm/plat-mxc/pwm.c2
12 files changed, 75 insertions, 20 deletions
diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig
index 2537166468ac..b9ab1d58b5e7 100644
--- a/arch/arm/plat-mxc/devices/Kconfig
+++ b/arch/arm/plat-mxc/devices/Kconfig
@@ -1,6 +1,6 @@
1config IMX_HAVE_PLATFORM_FEC 1config IMX_HAVE_PLATFORM_FEC
2 bool 2 bool
3 default y if ARCH_MX25 || SOC_IMX27 || SOC_IMX35 || SOC_IMX51 3 default y if ARCH_MX25 || SOC_IMX27 || SOC_IMX35 || SOC_IMX51 || SOC_IMX53
4 4
5config IMX_HAVE_PLATFORM_FLEXCAN 5config IMX_HAVE_PLATFORM_FLEXCAN
6 select HAVE_CAN_FLEXCAN if CAN 6 select HAVE_CAN_FLEXCAN if CAN
diff --git a/arch/arm/plat-mxc/devices/platform-fec.c b/arch/arm/plat-mxc/devices/platform-fec.c
index 269ec78aba77..b50c3517d083 100644
--- a/arch/arm/plat-mxc/devices/platform-fec.c
+++ b/arch/arm/plat-mxc/devices/platform-fec.c
@@ -36,6 +36,11 @@ const struct imx_fec_data imx51_fec_data __initconst =
36 imx_fec_data_entry_single(MX51); 36 imx_fec_data_entry_single(MX51);
37#endif 37#endif
38 38
39#ifdef CONFIG_SOC_IMX53
40const struct imx_fec_data imx53_fec_data __initconst =
41 imx_fec_data_entry_single(MX53);
42#endif
43
39struct platform_device *__init imx_add_fec( 44struct platform_device *__init imx_add_fec(
40 const struct imx_fec_data *data, 45 const struct imx_fec_data *data,
41 const struct fec_platform_data *pdata) 46 const struct fec_platform_data *pdata)
diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/plat-mxc/devices/platform-imx-i2c.c
index 72ba880c75af..7ba94e1bbda3 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-i2c.c
+++ b/arch/arm/plat-mxc/devices/platform-imx-i2c.c
@@ -78,6 +78,15 @@ const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = {
78}; 78};
79#endif /* ifdef CONFIG_SOC_IMX51 */ 79#endif /* ifdef CONFIG_SOC_IMX51 */
80 80
81#ifdef CONFIG_SOC_IMX53
82const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst = {
83#define imx53_imx_i2c_data_entry(_id, _hwid) \
84 imx_imx_i2c_data_entry(MX53, _id, _hwid, SZ_4K)
85 imx53_imx_i2c_data_entry(0, 1),
86 imx53_imx_i2c_data_entry(1, 2),
87};
88#endif /* ifdef CONFIG_SOC_IMX51 */
89
81struct platform_device *__init imx_add_imx_i2c( 90struct platform_device *__init imx_add_imx_i2c(
82 const struct imx_imx_i2c_data *data, 91 const struct imx_imx_i2c_data *data,
83 const struct imxi2c_platform_data *pdata) 92 const struct imxi2c_platform_data *pdata)
diff --git a/arch/arm/plat-mxc/devices/platform-imx-keypad.c b/arch/arm/plat-mxc/devices/platform-imx-keypad.c
index 40238f0b8643..26366114b021 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-keypad.c
+++ b/arch/arm/plat-mxc/devices/platform-imx-keypad.c
@@ -41,6 +41,11 @@ const struct imx_imx_keypad_data imx35_imx_keypad_data __initconst =
41 imx_imx_keypad_data_entry_single(MX35, SZ_16); 41 imx_imx_keypad_data_entry_single(MX35, SZ_16);
42#endif /* ifdef CONFIG_SOC_IMX35 */ 42#endif /* ifdef CONFIG_SOC_IMX35 */
43 43
44#ifdef CONFIG_SOC_IMX51
45const struct imx_imx_keypad_data imx51_imx_keypad_data __initconst =
46 imx_imx_keypad_data_entry_single(MX51, SZ_16);
47#endif /* ifdef CONFIG_SOC_IMX51 */
48
44struct platform_device *__init imx_add_imx_keypad( 49struct platform_device *__init imx_add_imx_keypad(
45 const struct imx_imx_keypad_data *data, 50 const struct imx_imx_keypad_data *data,
46 const struct matrix_keymap_data *pdata) 51 const struct matrix_keymap_data *pdata)
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
index 3d8ebdba38ee..b0c4ae298111 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
+++ b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
@@ -40,6 +40,15 @@ const struct imx_mxc_pwm_data imx27_mxc_pwm_data __initconst =
40 imx_mxc_pwm_data_entry_single(MX27, 0, , SZ_4K); 40 imx_mxc_pwm_data_entry_single(MX27, 0, , SZ_4K);
41#endif /* ifdef CONFIG_SOC_IMX27 */ 41#endif /* ifdef CONFIG_SOC_IMX27 */
42 42
43#ifdef CONFIG_SOC_IMX51
44const struct imx_mxc_pwm_data imx51_mxc_pwm_data[] __initconst = {
45#define imx51_mxc_pwm_data_entry(_id, _hwid) \
46 imx_mxc_pwm_data_entry(MX51, _id, _hwid, SZ_16K)
47 imx51_mxc_pwm_data_entry(0, 1),
48 imx51_mxc_pwm_data_entry(1, 2),
49};
50#endif /* ifdef CONFIG_SOC_IMX51 */
51
43struct platform_device *__init imx_add_mxc_pwm( 52struct platform_device *__init imx_add_mxc_pwm(
44 const struct imx_mxc_pwm_data *data) 53 const struct imx_mxc_pwm_data *data)
45{ 54{
diff --git a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c b/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
index b3525648a01d..6b2940b93d94 100644
--- a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
+++ b/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
@@ -53,6 +53,18 @@ imx51_sdhci_esdhc_imx_data[] __initconst = {
53}; 53};
54#endif /* ifdef CONFIG_SOC_IMX51 */ 54#endif /* ifdef CONFIG_SOC_IMX51 */
55 55
56#ifdef CONFIG_SOC_IMX53
57const struct imx_sdhci_esdhc_imx_data
58imx53_sdhci_esdhc_imx_data[] __initconst = {
59#define imx53_sdhci_esdhc_imx_data_entry(_id, _hwid) \
60 imx_sdhci_esdhc_imx_data_entry(MX53, _id, _hwid)
61 imx53_sdhci_esdhc_imx_data_entry(0, 1),
62 imx53_sdhci_esdhc_imx_data_entry(1, 2),
63 imx53_sdhci_esdhc_imx_data_entry(2, 3),
64 imx53_sdhci_esdhc_imx_data_entry(3, 4),
65};
66#endif /* ifdef CONFIG_SOC_IMX53 */
67
56struct platform_device *__init imx_add_sdhci_esdhc_imx( 68struct platform_device *__init imx_add_sdhci_esdhc_imx(
57 const struct imx_sdhci_esdhc_imx_data *data, 69 const struct imx_sdhci_esdhc_imx_data *data,
58 const struct esdhc_platform_data *pdata) 70 const struct esdhc_platform_data *pdata)
diff --git a/arch/arm/plat-mxc/devices/platform-spi_imx.c b/arch/arm/plat-mxc/devices/platform-spi_imx.c
index 8ea49adcdfc1..013c85f20b58 100644
--- a/arch/arm/plat-mxc/devices/platform-spi_imx.c
+++ b/arch/arm/plat-mxc/devices/platform-spi_imx.c
@@ -81,6 +81,18 @@ const struct imx_spi_imx_data imx51_ecspi_data[] __initconst = {
81}; 81};
82#endif /* ifdef CONFIG_SOC_IMX51 */ 82#endif /* ifdef CONFIG_SOC_IMX51 */
83 83
84#ifdef CONFIG_SOC_IMX53
85const struct imx_spi_imx_data imx53_cspi_data __initconst =
86 imx_spi_imx_data_entry_single(MX53, CSPI, "imx53-cspi", 0, , SZ_4K);
87
88const struct imx_spi_imx_data imx53_ecspi_data[] __initconst = {
89#define imx53_ecspi_data_entry(_id, _hwid) \
90 imx_spi_imx_data_entry(MX53, ECSPI, "imx53-ecspi", _id, _hwid, SZ_4K)
91 imx53_ecspi_data_entry(0, 1),
92 imx53_ecspi_data_entry(1, 2),
93};
94#endif /* ifdef CONFIG_SOC_IMX53 */
95
84struct platform_device *__init imx_add_spi_imx( 96struct platform_device *__init imx_add_spi_imx(
85 const struct imx_spi_imx_data *data, 97 const struct imx_spi_imx_data *data,
86 const struct spi_imx_master *pdata) 98 const struct spi_imx_master *pdata)
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h b/arch/arm/plat-mxc/include/mach/iomux-mx53.h
index 5deee019c29e..68e11d7ab79d 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx53.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx53.h
@@ -34,7 +34,6 @@ typedef enum iomux_config {
34 IOMUX_CONFIG_ALT6, 34 IOMUX_CONFIG_ALT6,
35 IOMUX_CONFIG_ALT7, 35 IOMUX_CONFIG_ALT7,
36 IOMUX_CONFIG_GPIO, /* added to help user use GPIO mode */ 36 IOMUX_CONFIG_GPIO, /* added to help user use GPIO mode */
37 IOMUX_CONFIG_SION = 0x1 << 4, /* LOOPBACK:MUX SION bit */
38} iomux_pin_cfg_t; 37} iomux_pin_cfg_t;
39 38
40/* These 2 defines are for pins that may not have a mux register, but could 39/* These 2 defines are for pins that may not have a mux register, but could
@@ -135,6 +134,9 @@ typedef enum iomux_config {
135#define MX53_PAD_EIM_D16__GPIO_3_16 IOMUX_PAD(0x460, 0x118,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL) 134#define MX53_PAD_EIM_D16__GPIO_3_16 IOMUX_PAD(0x460, 0x118,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL)
136#define MX53_PAD_EIM_D17__GPIO_3_17 IOMUX_PAD(0x464, 0x11C,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL) 135#define MX53_PAD_EIM_D17__GPIO_3_17 IOMUX_PAD(0x464, 0x11C,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL)
137#define MX53_PAD_EIM_D18__GPIO_3_18 IOMUX_PAD(0x468, 0x120,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL) 136#define MX53_PAD_EIM_D18__GPIO_3_18 IOMUX_PAD(0x468, 0x120,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL)
137#define MX53_PAD_EIM_D16__CSPI1_SCLK IOMUX_PAD(0x460, 0x118,IOMUX_CONFIG_ALT4, 0x79c, 3, NO_PAD_CTRL)
138#define MX53_PAD_EIM_D17__CSPI1_MISO IOMUX_PAD(0x464, 0x11C,IOMUX_CONFIG_ALT4, 0x7a0, 3, NO_PAD_CTRL)
139#define MX53_PAD_EIM_D18__CSPI1_MOSI IOMUX_PAD(0x468, 0x120,IOMUX_CONFIG_ALT4, 0x7a4, 3, NO_PAD_CTRL)
138#define MX53_PAD_EIM_D19__GPIO_3_19 IOMUX_PAD(0x46C, 0x124,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL) 140#define MX53_PAD_EIM_D19__GPIO_3_19 IOMUX_PAD(0x46C, 0x124,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL)
139#define MX53_PAD_EIM_D20__GPIO_3_20 IOMUX_PAD(0x470, 0x128,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL) 141#define MX53_PAD_EIM_D20__GPIO_3_20 IOMUX_PAD(0x470, 0x128,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL)
140#define MX53_PAD_EIM_D21__GPIO_3_21 IOMUX_PAD(0x474, 0x12C,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL) 142#define MX53_PAD_EIM_D21__GPIO_3_21 IOMUX_PAD(0x474, 0x12C,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL)
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h
index 2277b01c855d..82620af1922f 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h
@@ -105,6 +105,7 @@ typedef u64 iomux_v3_cfg_t;
105#define PAD_CTL_SRE_FAST (1 << 0) 105#define PAD_CTL_SRE_FAST (1 << 0)
106#define PAD_CTL_SRE_SLOW (0 << 0) 106#define PAD_CTL_SRE_SLOW (0 << 0)
107 107
108#define IOMUX_CONFIG_SION (0x1 << 4)
108 109
109#define MX51_NUM_GPIO_PORT 4 110#define MX51_NUM_GPIO_PORT 4
110 111
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index 873807f96d70..1eb339e6c857 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -301,8 +301,8 @@
301#define MX51_MXC_INT_GPIO4_HIGH 57 301#define MX51_MXC_INT_GPIO4_HIGH 57
302#define MX51_MXC_INT_WDOG1 58 302#define MX51_MXC_INT_WDOG1 58
303#define MX51_MXC_INT_WDOG2 59 303#define MX51_MXC_INT_WDOG2 59
304#define MX51_MXC_INT_KPP 60 304#define MX51_INT_KPP 60
305#define MX51_MXC_INT_PWM1 61 305#define MX51_INT_PWM1 61
306#define MX51_INT_I2C1 62 306#define MX51_INT_I2C1 62
307#define MX51_INT_I2C2 63 307#define MX51_INT_I2C2 63
308#define MX51_MXC_INT_HS_I2C 64 308#define MX51_MXC_INT_HS_I2C 64
@@ -335,7 +335,7 @@
335#define MX51_MXC_INT_SPDIF 91 335#define MX51_MXC_INT_SPDIF 91
336#define MX51_MXC_INT_TVE 92 336#define MX51_MXC_INT_TVE 92
337#define MX51_MXC_INT_FIRI 93 337#define MX51_MXC_INT_FIRI 93
338#define MX51_MXC_INT_PWM2 94 338#define MX51_INT_PWM2 94
339#define MX51_MXC_INT_SLIM_EXP 95 339#define MX51_MXC_INT_SLIM_EXP 95
340#define MX51_INT_SSI3 96 340#define MX51_INT_SSI3 96
341#define MX51_MXC_INT_EMI_BOOT 97 341#define MX51_MXC_INT_EMI_BOOT 97
diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h
index 9577cdbf7fad..d7a8e52181ea 100644
--- a/arch/arm/plat-mxc/include/mach/mx53.h
+++ b/arch/arm/plat-mxc/include/mach/mx53.h
@@ -53,13 +53,13 @@
53#define MX53_SPBA0_BASE_ADDR 0x50000000 53#define MX53_SPBA0_BASE_ADDR 0x50000000
54#define MX53_SPBA0_SIZE SZ_1M 54#define MX53_SPBA0_SIZE SZ_1M
55 55
56#define MX53_MMC_SDHC1_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00004000) 56#define MX53_ESDHC1_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00004000)
57#define MX53_MMC_SDHC2_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00008000) 57#define MX53_ESDHC2_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00008000)
58#define MX53_UART3_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x0000C000) 58#define MX53_UART3_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x0000C000)
59#define MX53_CSPI1_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00010000) 59#define MX53_ECSPI1_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00010000)
60#define MX53_SSI2_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00014000) 60#define MX53_SSI2_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00014000)
61#define MX53_MMC_SDHC3_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00020000) 61#define MX53_ESDHC3_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00020000)
62#define MX53_MMC_SDHC4_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00024000) 62#define MX53_ESDHC4_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00024000)
63#define MX53_SPDIF_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00028000) 63#define MX53_SPDIF_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00028000)
64#define MX53_ASRC_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x0002C000) 64#define MX53_ASRC_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x0002C000)
65#define MX53_ATA_DMA_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00030000) 65#define MX53_ATA_DMA_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00030000)
@@ -117,12 +117,12 @@
117#define MX53_ARM_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000A0000) 117#define MX53_ARM_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000A0000)
118#define MX53_OWIRE_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000A4000) 118#define MX53_OWIRE_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000A4000)
119#define MX53_FIRI_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000A8000) 119#define MX53_FIRI_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000A8000)
120#define MX53_CSPI2_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000AC000) 120#define MX53_ECSPI2_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000AC000)
121#define MX53_SDMA_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000B0000) 121#define MX53_SDMA_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000B0000)
122#define MX53_SCC_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000B4000) 122#define MX53_SCC_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000B4000)
123#define MX53_ROMCP_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000B8000) 123#define MX53_ROMCP_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000B8000)
124#define MX53_RTIC_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000BC000) 124#define MX53_RTIC_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000BC000)
125#define MX53_CSPI3_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000C0000) 125#define MX53_CSPI_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000C0000)
126#define MX53_I2C2_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000C4000) 126#define MX53_I2C2_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000C4000)
127#define MX53_I2C1_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000C8000) 127#define MX53_I2C1_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000C8000)
128#define MX53_SSI1_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000CC000) 128#define MX53_SSI1_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000CC000)
@@ -136,7 +136,7 @@
136#define MX53_MIPI_HSC_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000DC000) 136#define MX53_MIPI_HSC_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000DC000)
137#define MX53_MLB_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000E4000) 137#define MX53_MLB_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000E4000)
138#define MX53_SSI3_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000E8000) 138#define MX53_SSI3_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000E8000)
139#define MX53_MXC_FEC_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000EC000) 139#define MX53_FEC_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000EC000)
140#define MX53_TVE_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000F0000) 140#define MX53_TVE_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000F0000)
141#define MX53_VPU_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000F4000) 141#define MX53_VPU_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000F4000)
142#define MX53_SAHARA_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000F8000) 142#define MX53_SAHARA_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000F8000)
@@ -229,10 +229,10 @@
229 * Interrupt numbers 229 * Interrupt numbers
230 */ 230 */
231#define MX53_INT_RESV0 0 231#define MX53_INT_RESV0 0
232#define MX53_INT_MMC_SDHC1 1 232#define MX53_INT_ESDHC1 1
233#define MX53_INT_MMC_SDHC2 2 233#define MX53_INT_ESDHC2 2
234#define MX53_INT_MMC_SDHC3 3 234#define MX53_INT_ESDHC3 3
235#define MX53_INT_MMC_SDHC4 4 235#define MX53_INT_ESDHC4 4
236#define MX53_INT_RESV5 5 236#define MX53_INT_RESV5 5
237#define MX53_INT_SDMA 6 237#define MX53_INT_SDMA 6
238#define MX53_INT_IOMUX 7 238#define MX53_INT_IOMUX 7
@@ -264,8 +264,8 @@
264#define MX53_INT_UART3 33 264#define MX53_INT_UART3 33
265#define MX53_INT_RESV34 34 265#define MX53_INT_RESV34 34
266#define MX53_INT_RESV35 35 266#define MX53_INT_RESV35 35
267#define MX53_INT_CSPI1 36 267#define MX53_INT_ECSPI1 36
268#define MX53_INT_CSPI2 37 268#define MX53_INT_ECSPI2 37
269#define MX53_INT_CSPI 38 269#define MX53_INT_CSPI 38
270#define MX53_INT_GPT 39 270#define MX53_INT_GPT 39
271#define MX53_INT_EPIT1 40 271#define MX53_INT_EPIT1 40
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index c36f2630ed93..7a61ef8f471a 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -57,7 +57,7 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
57 if (pwm == NULL || period_ns == 0 || duty_ns > period_ns) 57 if (pwm == NULL || period_ns == 0 || duty_ns > period_ns)
58 return -EINVAL; 58 return -EINVAL;
59 59
60 if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25()) { 60 if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51()) {
61 unsigned long long c; 61 unsigned long long c;
62 unsigned long period_cycles, duty_cycles, prescale; 62 unsigned long period_cycles, duty_cycles, prescale;
63 u32 cr; 63 u32 cr;