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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-01 22:55:06 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-01 22:55:06 -0400 |
| commit | 68e24ba70465b82ad24e0774ceab5360180d4627 (patch) | |
| tree | 5d2b8e22e556360f353b2d1c73a19aaf6c5becd9 /arch/arm/plat-mxc | |
| parent | b4beb4bf9934d151bf4581a54ae028927374cb2a (diff) | |
| parent | 5725aeae5ff2e39f3815bbef788ee326c9afea2c (diff) | |
Merge branch 'next/fixes' of git://git.linaro.org/people/arnd/arm-soc
* 'next/fixes' of git://git.linaro.org/people/arnd/arm-soc: (28 commits)
ARM: pxa/cm-x300: properly set bt_reset pin
ARM: mmp: rename SHEEVAD to GPLUGD
ARM: imx: Fix typo 'MACH_MX31_3DS_MXC_NAND_USE_BBT'
ARM: i.MX28: shift frac value in _CLK_SET_RATE
plat-mxc: iomux-v3.h: implicitly enable pull-up/down when that's desired
ARM: mx5: fix clock usage for suspend
ARM: pxa: use correct __iomem annotations
ARM: pxa: sharpsl pm needs SPI
ARM: pxa: centro and treo680 need palm27x
ARM: pxa: make pxafb_smart_*() empty when not enabled
ARM: pxa: select POWER_SUPPLY on raumfeld
ARM: pxa: pxa95x is incompatible with earlier pxa
ARM: pxa: CPU_FREQ_TABLE is needed for CPU_FREQ
ARM: pxa: pxa95x/saarb depends on pxa3xx code
ARM: pxa: allow selecting just one of TREO680/CENTRO
ARM: pxa: export symbols from pxa3xx-ulpi
ARM: pxa: make zylonite_pxa*_init declaration match code
ARM: pxa/z2: fix building error of pxa27x_cpu_suspend() no longer available
ARM: at91: add defconfig for at91sam9g45 family
ARM: at91: remove dependency for Atmel PWM driver selector in Kconfig
...
Diffstat (limited to 'arch/arm/plat-mxc')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-v3.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h index ebbce33097a7..45099566fecc 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h | |||
| @@ -89,11 +89,11 @@ typedef u64 iomux_v3_cfg_t; | |||
| 89 | #define PAD_CTL_HYS (1 << 8) | 89 | #define PAD_CTL_HYS (1 << 8) |
| 90 | 90 | ||
| 91 | #define PAD_CTL_PKE (1 << 7) | 91 | #define PAD_CTL_PKE (1 << 7) |
| 92 | #define PAD_CTL_PUE (1 << 6) | 92 | #define PAD_CTL_PUE (1 << 6 | PAD_CTL_PKE) |
| 93 | #define PAD_CTL_PUS_100K_DOWN (0 << 4) | 93 | #define PAD_CTL_PUS_100K_DOWN (0 << 4 | PAD_CTL_PUE) |
| 94 | #define PAD_CTL_PUS_47K_UP (1 << 4) | 94 | #define PAD_CTL_PUS_47K_UP (1 << 4 | PAD_CTL_PUE) |
| 95 | #define PAD_CTL_PUS_100K_UP (2 << 4) | 95 | #define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE) |
| 96 | #define PAD_CTL_PUS_22K_UP (3 << 4) | 96 | #define PAD_CTL_PUS_22K_UP (3 << 4 | PAD_CTL_PUE) |
| 97 | 97 | ||
| 98 | #define PAD_CTL_ODE (1 << 3) | 98 | #define PAD_CTL_ODE (1 << 3) |
| 99 | 99 | ||