diff options
author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-02-15 10:57:09 -0500 |
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committer | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-02-24 04:07:09 -0500 |
commit | f021b5a1ef1b229ddc8c5cf3f2c5da308d974a5a (patch) | |
tree | fd494c632b057685ff1f1dc11c905ce0eccdcac3 /arch/arm/plat-mxc/iomux-v1.c | |
parent | 5e2e95f520538e095d10456acd28d9107317aa32 (diff) |
arm/imx/iomux-v1: make base address a runtime choice
While at it move register modification to static inlines and
so make the relevant code more readable.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/iomux-v1.c')
-rw-r--r-- | arch/arm/plat-mxc/iomux-v1.c | 193 |
1 files changed, 127 insertions, 66 deletions
diff --git a/arch/arm/plat-mxc/iomux-v1.c b/arch/arm/plat-mxc/iomux-v1.c index 0b745686b378..aeaf2951579a 100644 --- a/arch/arm/plat-mxc/iomux-v1.c +++ b/arch/arm/plat-mxc/iomux-v1.c | |||
@@ -1,9 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/plat-mxc/iomux-v1.c | 2 | * arch/arm/plat-mxc/iomux-v1.c |
3 | * | 3 | * |
4 | * author: Sascha Hauer | 4 | * Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH |
5 | * Created: april 20th, 2004 | 5 | * Copyright (C) 2009 Uwe Kleine-Koenig, Pengutronix |
6 | * Copyright: Synertronixx GmbH | ||
7 | * | 6 | * |
8 | * Common code for i.MX1, i.MX21 and i.MX27 | 7 | * Common code for i.MX1, i.MX21 and i.MX27 |
9 | * | 8 | * |
@@ -18,9 +17,8 @@ | |||
18 | * GNU General Public License for more details. | 17 | * GNU General Public License for more details. |
19 | * | 18 | * |
20 | * You should have received a copy of the GNU General Public License | 19 | * You should have received a copy of the GNU General Public License |
21 | * along with this program; if not, write to the Free Software | 20 | * along with this program; if not, write to the Free Software Foundation, Inc., |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 21 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. |
23 | * | ||
24 | */ | 22 | */ |
25 | 23 | ||
26 | #include <linux/errno.h> | 24 | #include <linux/errno.h> |
@@ -34,78 +32,119 @@ | |||
34 | #include <asm/mach/map.h> | 32 | #include <asm/mach/map.h> |
35 | #include <mach/iomux.h> | 33 | #include <mach/iomux.h> |
36 | 34 | ||
35 | static void __iomem *imx_iomuxv1_baseaddr; | ||
36 | |||
37 | static inline unsigned long imx_iomuxv1_readl(unsigned offset) | ||
38 | { | ||
39 | return __raw_readl(imx_iomuxv1_baseaddr + offset); | ||
40 | } | ||
41 | |||
42 | static inline void imx_iomuxv1_writel(unsigned long val, unsigned offset) | ||
43 | { | ||
44 | __raw_writel(val, imx_iomuxv1_baseaddr + offset); | ||
45 | } | ||
46 | |||
47 | static inline void imx_iomuxv1_rmwl(unsigned offset, | ||
48 | unsigned long mask, unsigned long value) | ||
49 | { | ||
50 | unsigned long reg = imx_iomuxv1_readl(offset); | ||
51 | |||
52 | reg &= ~mask; | ||
53 | reg |= value; | ||
54 | |||
55 | imx_iomuxv1_writel(reg, offset); | ||
56 | } | ||
57 | |||
58 | static inline void imx_iomuxv1_set_puen( | ||
59 | unsigned int port, unsigned int pin, int on) | ||
60 | { | ||
61 | unsigned long mask = 1 << pin; | ||
62 | |||
63 | imx_iomuxv1_rmwl(MXC_PUEN(port), mask, on ? mask : 0); | ||
64 | } | ||
65 | |||
66 | static inline void imx_iomuxv1_set_ddir( | ||
67 | unsigned int port, unsigned int pin, int out) | ||
68 | { | ||
69 | unsigned long mask = 1 << pin; | ||
70 | |||
71 | imx_iomuxv1_rmwl(MXC_DDIR(port), mask, out ? mask : 0); | ||
72 | } | ||
73 | |||
74 | static inline void imx_iomuxv1_set_gpr( | ||
75 | unsigned int port, unsigned int pin, int af) | ||
76 | { | ||
77 | unsigned long mask = 1 << pin; | ||
78 | |||
79 | imx_iomuxv1_rmwl(MXC_GPR(port), mask, af ? mask : 0); | ||
80 | } | ||
81 | |||
82 | static inline void imx_iomuxv1_set_gius( | ||
83 | unsigned int port, unsigned int pin, int inuse) | ||
84 | { | ||
85 | unsigned long mask = 1 << pin; | ||
86 | |||
87 | imx_iomuxv1_rmwl(MXC_GIUS(port), mask, inuse ? mask : 0); | ||
88 | } | ||
89 | |||
90 | static inline void imx_iomuxv1_set_ocr( | ||
91 | unsigned int port, unsigned int pin, unsigned int ocr) | ||
92 | { | ||
93 | unsigned long shift = (pin & 0xf) << 1; | ||
94 | unsigned long mask = 3 << shift; | ||
95 | unsigned long value = ocr << shift; | ||
96 | unsigned long offset = pin < 16 ? MXC_OCR1(port) : MXC_OCR2(port); | ||
97 | |||
98 | imx_iomuxv1_rmwl(offset, mask, value); | ||
99 | } | ||
100 | |||
101 | static inline void imx_iomuxv1_set_iconfa( | ||
102 | unsigned int port, unsigned int pin, unsigned int aout) | ||
103 | { | ||
104 | unsigned long shift = (pin & 0xf) << 1; | ||
105 | unsigned long mask = 3 << shift; | ||
106 | unsigned long value = aout << shift; | ||
107 | unsigned long offset = pin < 16 ? MXC_ICONFA1(port) : MXC_ICONFA2(port); | ||
108 | |||
109 | imx_iomuxv1_rmwl(offset, mask, value); | ||
110 | } | ||
111 | |||
112 | static inline void imx_iomuxv1_set_iconfb( | ||
113 | unsigned int port, unsigned int pin, unsigned int bout) | ||
114 | { | ||
115 | unsigned long shift = (pin & 0xf) << 1; | ||
116 | unsigned long mask = 3 << shift; | ||
117 | unsigned long value = bout << shift; | ||
118 | unsigned long offset = pin < 16 ? MXC_ICONFB1(port) : MXC_ICONFB2(port); | ||
119 | |||
120 | imx_iomuxv1_rmwl(offset, mask, value); | ||
121 | } | ||
122 | |||
37 | void mxc_gpio_mode(int gpio_mode) | 123 | void mxc_gpio_mode(int gpio_mode) |
38 | { | 124 | { |
39 | unsigned int pin = gpio_mode & GPIO_PIN_MASK; | 125 | unsigned int pin = gpio_mode & GPIO_PIN_MASK; |
40 | unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT; | 126 | unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT; |
41 | unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT; | 127 | unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT; |
42 | unsigned int tmp; | 128 | unsigned int aout = (gpio_mode >> GPIO_AOUT_SHIFT) & 3; |
129 | unsigned int bout = (gpio_mode >> GPIO_BOUT_SHIFT) & 3; | ||
43 | 130 | ||
44 | /* Pullup enable */ | 131 | /* Pullup enable */ |
45 | tmp = __raw_readl(VA_GPIO_BASE + MXC_PUEN(port)); | 132 | imx_iomuxv1_set_puen(port, pin, gpio_mode & GPIO_PUEN); |
46 | if (gpio_mode & GPIO_PUEN) | ||
47 | tmp |= (1 << pin); | ||
48 | else | ||
49 | tmp &= ~(1 << pin); | ||
50 | __raw_writel(tmp, VA_GPIO_BASE + MXC_PUEN(port)); | ||
51 | 133 | ||
52 | /* Data direction */ | 134 | /* Data direction */ |
53 | tmp = __raw_readl(VA_GPIO_BASE + MXC_DDIR(port)); | 135 | imx_iomuxv1_set_ddir(port, pin, gpio_mode & GPIO_OUT); |
54 | if (gpio_mode & GPIO_OUT) | ||
55 | tmp |= 1 << pin; | ||
56 | else | ||
57 | tmp &= ~(1 << pin); | ||
58 | __raw_writel(tmp, VA_GPIO_BASE + MXC_DDIR(port)); | ||
59 | 136 | ||
60 | /* Primary / alternate function */ | 137 | /* Primary / alternate function */ |
61 | tmp = __raw_readl(VA_GPIO_BASE + MXC_GPR(port)); | 138 | imx_iomuxv1_set_gpr(port, pin, gpio_mode & GPIO_AF); |
62 | if (gpio_mode & GPIO_AF) | ||
63 | tmp |= (1 << pin); | ||
64 | else | ||
65 | tmp &= ~(1 << pin); | ||
66 | __raw_writel(tmp, VA_GPIO_BASE + MXC_GPR(port)); | ||
67 | 139 | ||
68 | /* use as gpio? */ | 140 | /* use as gpio? */ |
69 | tmp = __raw_readl(VA_GPIO_BASE + MXC_GIUS(port)); | 141 | imx_iomuxv1_set_gius(port, pin, !(gpio_mode & (GPIO_PF | GPIO_AF))); |
70 | if (gpio_mode & (GPIO_PF | GPIO_AF)) | 142 | |
71 | tmp &= ~(1 << pin); | 143 | imx_iomuxv1_set_ocr(port, pin, ocr); |
72 | else | 144 | |
73 | tmp |= (1 << pin); | 145 | imx_iomuxv1_set_iconfa(port, pin, aout); |
74 | __raw_writel(tmp, VA_GPIO_BASE + MXC_GIUS(port)); | 146 | |
75 | 147 | imx_iomuxv1_set_iconfb(port, pin, bout); | |
76 | if (pin < 16) { | ||
77 | tmp = __raw_readl(VA_GPIO_BASE + MXC_OCR1(port)); | ||
78 | tmp &= ~(3 << (pin * 2)); | ||
79 | tmp |= (ocr << (pin * 2)); | ||
80 | __raw_writel(tmp, VA_GPIO_BASE + MXC_OCR1(port)); | ||
81 | |||
82 | tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFA1(port)); | ||
83 | tmp &= ~(3 << (pin * 2)); | ||
84 | tmp |= ((gpio_mode >> GPIO_AOUT_SHIFT) & 3) << (pin * 2); | ||
85 | __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFA1(port)); | ||
86 | |||
87 | tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFB1(port)); | ||
88 | tmp &= ~(3 << (pin * 2)); | ||
89 | tmp |= ((gpio_mode >> GPIO_BOUT_SHIFT) & 3) << (pin * 2); | ||
90 | __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFB1(port)); | ||
91 | } else { | ||
92 | pin -= 16; | ||
93 | |||
94 | tmp = __raw_readl(VA_GPIO_BASE + MXC_OCR2(port)); | ||
95 | tmp &= ~(3 << (pin * 2)); | ||
96 | tmp |= (ocr << (pin * 2)); | ||
97 | __raw_writel(tmp, VA_GPIO_BASE + MXC_OCR2(port)); | ||
98 | |||
99 | tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFA2(port)); | ||
100 | tmp &= ~(3 << (pin * 2)); | ||
101 | tmp |= ((gpio_mode >> GPIO_AOUT_SHIFT) & 3) << (pin * 2); | ||
102 | __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFA2(port)); | ||
103 | |||
104 | tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFB2(port)); | ||
105 | tmp &= ~(3 << (pin * 2)); | ||
106 | tmp |= ((gpio_mode >> GPIO_BOUT_SHIFT) & 3) << (pin * 2); | ||
107 | __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFB2(port)); | ||
108 | } | ||
109 | } | 148 | } |
110 | EXPORT_SYMBOL(mxc_gpio_mode); | 149 | EXPORT_SYMBOL(mxc_gpio_mode); |
111 | 150 | ||
@@ -151,6 +190,28 @@ void mxc_gpio_release_multiple_pins(const int *pin_list, int count) | |||
151 | gpio_free(gpio); | 190 | gpio_free(gpio); |
152 | p++; | 191 | p++; |
153 | } | 192 | } |
154 | |||
155 | } | 193 | } |
156 | EXPORT_SYMBOL(mxc_gpio_release_multiple_pins); | 194 | EXPORT_SYMBOL(mxc_gpio_release_multiple_pins); |
195 | |||
196 | static int imx_iomuxv1_init(void) | ||
197 | { | ||
198 | #ifdef CONFIG_ARCH_MX1 | ||
199 | if (cpu_is_mx1()) | ||
200 | imx_iomuxv1_baseaddr = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR); | ||
201 | else | ||
202 | #endif | ||
203 | #ifdef CONFIG_MACH_MX21 | ||
204 | if (cpu_is_mx21()) | ||
205 | imx_iomuxv1_baseaddr = MX21_IO_ADDRESS(MX21_GPIO_BASE_ADDR); | ||
206 | else | ||
207 | #endif | ||
208 | #ifdef CONFIG_MACH_MX27 | ||
209 | if (cpu_is_mx27()) | ||
210 | imx_iomuxv1_baseaddr = MX27_IO_ADDRESS(MX27_GPIO_BASE_ADDR); | ||
211 | else | ||
212 | #endif | ||
213 | return -ENODEV; | ||
214 | |||
215 | return 0; | ||
216 | } | ||
217 | pure_initcall(imx_iomuxv1_init); | ||