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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-02-15 03:47:55 -0500
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-02-24 04:07:16 -0500
commitbac3fcfad565c9bbceeed8b607f140c29df97355 (patch)
tree63e89451b3c411416de61f5ed557cf50236ec616 /arch/arm/plat-mxc/include
parente835d88e71f54c048a8cc907cc34084f1dd5846b (diff)
arm/imx/iomux-v1: check for invalid modes in mxc_gpio_mode
mxc_gpio_mode checks for invalid pins and so it returns zero for success, -EINVAL for invalid pins. While at it, remove definitions of GPIO_PORT_MAX removed as they are unused now. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/include')
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx3.h5
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-v1.h17
2 files changed, 5 insertions, 17 deletions
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
index e5e5861cbbe1..e51465d7b224 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
@@ -165,11 +165,6 @@ int mxc_iomux_mode(unsigned int pin_mode);
165 MXC_GPIO_IRQ_START) 165 MXC_GPIO_IRQ_START)
166 166
167/* 167/*
168 * The number of gpio devices among the pads
169 */
170#define GPIO_PORT_MAX 3
171
172/*
173 * This enumeration is constructed based on the Section 168 * This enumeration is constructed based on the Section
174 * "sw_pad_ctl & sw_mux_ctl details" of the MX31 IC Spec. Each enumerated 169 * "sw_pad_ctl & sw_mux_ctl details" of the MX31 IC Spec. Each enumerated
175 * value is constructed based on the rules described above. 170 * value is constructed based on the rules described above.
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/plat-mxc/include/mach/iomux-v1.h
index 54abfc051b72..884f5753f279 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v1.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-v1.h
@@ -41,16 +41,9 @@
41#define MXC_SWR(x) (0x3c + ((x) << 8)) 41#define MXC_SWR(x) (0x3c + ((x) << 8))
42#define MXC_PUEN(x) (0x40 + ((x) << 8)) 42#define MXC_PUEN(x) (0x40 + ((x) << 8))
43 43
44#ifdef CONFIG_ARCH_MX1 44#define MX1_NUM_GPIO_PORT 4
45# define GPIO_PORT_MAX 3 45#define MX21_NUM_GPIO_PORT 6
46#endif 46#define MX27_NUM_GPIO_PORT 6
47#ifdef CONFIG_ARCH_MX2
48# define GPIO_PORT_MAX 5
49#endif
50
51#ifndef GPIO_PORT_MAX
52# error "GPIO config port count unknown!"
53#endif
54 47
55#define GPIO_PIN_MASK 0x1f 48#define GPIO_PIN_MASK 0x1f
56 49
@@ -102,9 +95,9 @@
102#define IRQ_GPIOE(x) (IRQ_GPIOD(32) + x) 95#define IRQ_GPIOE(x) (IRQ_GPIOD(32) + x)
103#define IRQ_GPIOF(x) (IRQ_GPIOE(32) + x) 96#define IRQ_GPIOF(x) (IRQ_GPIOE(32) + x)
104 97
105extern void mxc_gpio_mode(int gpio_mode); 98extern int mxc_gpio_mode(int gpio_mode);
106extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, 99extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
107 const char *label); 100 const char *label);
108extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count); 101extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count);
109 102
110#endif /* __MACH_IOMUX_V1_H__ */ 103#endif /* __MACH_IOMUX_V1_H__ */