aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/plat-mxc/include
diff options
context:
space:
mode:
authorJason Liu <jason.hui@linaro.org>2011-09-09 05:17:48 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2011-09-20 03:54:58 -0400
commit281e10da20dcae1730a1aa37356da0688bde989e (patch)
treeff0a9f42febe34d09270825bb6ce2503ef504096 /arch/arm/plat-mxc/include
parentabca2e10feebbee8b739f5f92e9cd6e7e4c1ee35 (diff)
ARM: mx5/mm: Remove MX51_DEBUG related mapping
MX51_DEBUG related mapping is dead code, no-one uses it Signed-off-by: Jason Liu <jason.hui@linaro.org> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/include')
-rw-r--r--arch/arm/plat-mxc/include/mach/hardware.h1
-rw-r--r--arch/arm/plat-mxc/include/mach/mx51.h12
2 files changed, 0 insertions, 13 deletions
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index a8bfd565dcad..33728aa2af47 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -82,7 +82,6 @@
82 * AIPS2 0x63f00000+0x100000 -> 0xf5300000+0x100000 82 * AIPS2 0x63f00000+0x100000 -> 0xf5300000+0x100000
83 * mx51: 83 * mx51:
84 * IRAM 0x1ffe0000+0x020000 -> 0xf4fe0000+0x020000 84 * IRAM 0x1ffe0000+0x020000 -> 0xf4fe0000+0x020000
85 * DEBUG 0x60000000+0x100000 -> 0xf5000000+0x100000
86 * SPBA0 0x70000000+0x100000 -> 0xf5400000+0x100000 85 * SPBA0 0x70000000+0x100000 -> 0xf5400000+0x100000
87 * AIPS1 0x73f00000+0x100000 -> 0xf5700000+0x100000 86 * AIPS1 0x73f00000+0x100000 -> 0xf5700000+0x100000
88 * AIPS2 0x83f00000+0x100000 -> 0xf4300000+0x100000 87 * AIPS2 0x83f00000+0x100000 -> 0xf4300000+0x100000
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index dede19a766ff..652f2b051297 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -18,18 +18,6 @@
18#define MX51_GPU_CTRL_BASE_ADDR 0x30000000 18#define MX51_GPU_CTRL_BASE_ADDR 0x30000000
19#define MX51_IPU_CTRL_BASE_ADDR 0x40000000 19#define MX51_IPU_CTRL_BASE_ADDR 0x40000000
20 20
21#define MX51_DEBUG_BASE_ADDR 0x60000000
22#define MX51_DEBUG_SIZE SZ_1M
23
24#define MX51_ETB_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x01000)
25#define MX51_ETM_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x02000)
26#define MX51_TPIU_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x03000)
27#define MX51_CTI0_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x04000)
28#define MX51_CTI1_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x05000)
29#define MX51_CTI2_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x06000)
30#define MX51_CTI3_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x07000)
31#define MX51_CORTEX_DBG_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x08000)
32
33/* 21/*
34 * SPBA global module enabled #0 22 * SPBA global module enabled #0
35 */ 23 */