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authorArnd Bergmann <arnd@arndb.de>2011-10-20 12:32:28 -0400
committerArnd Bergmann <arnd@arndb.de>2011-10-20 12:32:28 -0400
commitd6bb0f27709b91e674ce1441e2dd5e68620edf14 (patch)
tree1b79f4894618a8849b06d0f12152e9c35053d94a /arch/arm/plat-mxc/include
parent2f540738f8d228016c6cd0d3b303896c174ecee3 (diff)
parent91056a63a7d8dbc817747a22d9a9490463323575 (diff)
Merge branch 'imx/cleanup' into next/cleanup
Diffstat (limited to 'arch/arm/plat-mxc/include')
-rw-r--r--arch/arm/plat-mxc/include/mach/mx27.h14
-rw-r--r--arch/arm/plat-mxc/include/mach/mx31.h14
2 files changed, 0 insertions, 28 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h
index 1dc1c522601b..6265357284d7 100644
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/plat-mxc/include/mach/mx27.h
@@ -24,10 +24,6 @@
24#ifndef __MACH_MX27_H__ 24#ifndef __MACH_MX27_H__
25#define __MACH_MX27_H__ 25#define __MACH_MX27_H__
26 26
27#ifndef __ASSEMBLER__
28#include <linux/io.h>
29#endif
30
31#define MX27_AIPI_BASE_ADDR 0x10000000 27#define MX27_AIPI_BASE_ADDR 0x10000000
32#define MX27_AIPI_SIZE SZ_1M 28#define MX27_AIPI_SIZE SZ_1M
33#define MX27_DMA_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x01000) 29#define MX27_DMA_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x01000)
@@ -131,16 +127,6 @@
131#define MX27_IO_P2V(x) IMX_IO_P2V(x) 127#define MX27_IO_P2V(x) IMX_IO_P2V(x)
132#define MX27_IO_ADDRESS(x) IOMEM(MX27_IO_P2V(x)) 128#define MX27_IO_ADDRESS(x) IOMEM(MX27_IO_P2V(x))
133 129
134#ifndef __ASSEMBLER__
135static inline void mx27_setup_weimcs(size_t cs,
136 unsigned upper, unsigned lower, unsigned addional)
137{
138 __raw_writel(upper, MX27_IO_ADDRESS(MX27_WEIM_CSCRxU(cs)));
139 __raw_writel(lower, MX27_IO_ADDRESS(MX27_WEIM_CSCRxL(cs)));
140 __raw_writel(addional, MX27_IO_ADDRESS(MX27_WEIM_CSCRxA(cs)));
141}
142#endif
143
144/* fixed interrupt numbers */ 130/* fixed interrupt numbers */
145#define MX27_INT_I2C2 1 131#define MX27_INT_I2C2 1
146#define MX27_INT_GPT6 2 132#define MX27_INT_GPT6 2
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index 79e7fc01bb59..e27619e442c0 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -1,10 +1,6 @@
1#ifndef __MACH_MX31_H__ 1#ifndef __MACH_MX31_H__
2#define __MACH_MX31_H__ 2#define __MACH_MX31_H__
3 3
4#ifndef __ASSEMBLER__
5#include <linux/io.h>
6#endif
7
8/* 4/*
9 * IRAM 5 * IRAM
10 */ 6 */
@@ -122,16 +118,6 @@
122#define MX31_IO_P2V(x) IMX_IO_P2V(x) 118#define MX31_IO_P2V(x) IMX_IO_P2V(x)
123#define MX31_IO_ADDRESS(x) IOMEM(MX31_IO_P2V(x)) 119#define MX31_IO_ADDRESS(x) IOMEM(MX31_IO_P2V(x))
124 120
125#ifndef __ASSEMBLER__
126static inline void mx31_setup_weimcs(size_t cs,
127 unsigned upper, unsigned lower, unsigned addional)
128{
129 __raw_writel(upper, MX31_IO_ADDRESS(MX31_WEIM_CSCRxU(cs)));
130 __raw_writel(lower, MX31_IO_ADDRESS(MX31_WEIM_CSCRxL(cs)));
131 __raw_writel(addional, MX31_IO_ADDRESS(MX31_WEIM_CSCRxA(cs)));
132}
133#endif
134
135#define MX31_INT_I2C3 3 121#define MX31_INT_I2C3 3
136#define MX31_INT_I2C2 4 122#define MX31_INT_I2C2 4
137#define MX31_INT_MPEG4_ENCODER 5 123#define MX31_INT_MPEG4_ENCODER 5