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authorPeter Horton <phorton@bitbox.co.uk>2010-12-06 06:37:38 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2010-12-14 03:54:37 -0500
commitcdc3f10630ecddb7870e087ff9679eef3d7b4e21 (patch)
treebcffe39f52a334e9ad8e56b15843a42e228988da /arch/arm/plat-mxc/include
parent8be9252f7ccde4148e4b203bf64d38ae66b111e4 (diff)
mx51: support FIQ on TZIC, revised
Add support for FIQ on mx51 TZIC TZIC changes tested with FIQ audio on an mx51 board AVIC changes build with mx3_defconfig, not tested Signed-off-by: Peter Horton <phorton@bitbox.co.uk> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/include')
-rw-r--r--arch/arm/plat-mxc/include/mach/entry-macro.S14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index aeb08697726b..bd9bb9799141 100644
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -54,15 +54,15 @@
54#elif defined CONFIG_MXC_TZIC 54#elif defined CONFIG_MXC_TZIC
55 @ Load offset & priority of the highest priority 55 @ Load offset & priority of the highest priority
56 @ interrupt pending. 56 @ interrupt pending.
57 @ 0x080 is INTSEC0 register
57 @ 0xD80 is HIPND0 register 58 @ 0xD80 is HIPND0 register
58 mov \irqnr, #0 59 mov \irqnr, #0
59 mov \irqstat, #0x0D80 601000: add \irqstat, \base, \irqnr, lsr #3
601000: 61 ldr \tmp, [\irqstat, #0xd80]
61 ldr \tmp, [\irqstat, \base] 62 ldr \irqstat, [\irqstat, #0x080]
62 cmp \tmp, #0 63 ands \tmp, \tmp, \irqstat
63 bne 1001f 64 bne 1001f
64 addeq \irqnr, \irqnr, #32 65 add \irqnr, \irqnr, #32
65 addeq \irqstat, \irqstat, #4
66 cmp \irqnr, #128 66 cmp \irqnr, #128
67 blo 1000b 67 blo 1000b
68 b 2001f 68 b 2001f