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authorJuergen Beisert <j.beisert@pengutronix.de>2008-07-05 04:02:47 -0400
committerRobert Schwebel <r.schwebel@pengutronix.de>2008-07-05 04:02:47 -0400
commitc0db2ea4e366c94dd3f880928c02534156e3d1b9 (patch)
treee8486fedc9d405b2867c3a474ebc18fad394836c /arch/arm/plat-mxc/Makefile
parent38a41fdf94c449c165213e4665c3f8a0d30f8aba (diff)
MXC family: Add clock handling
Internal clock path handling for the mxc CPUs. Changed against the original Freescale code (and against clocklib for example): - clock rate is always calculated whenever one ask for the current rate (means struct clk has no more a member called "rate"). So switching the PLL base frequency will propagate immediately to all other clocks that are depending on this frequency. Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/Makefile')
-rw-r--r--arch/arm/plat-mxc/Makefile2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index f96dc0362068..3eb181cb7afb 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -3,4 +3,4 @@
3# 3#
4 4
5# Common support 5# Common support
6obj-y := irq.o 6obj-y := irq.o clock.o