diff options
author | Andrew Lunn <andrew@lunn.ch> | 2014-02-22 14:14:52 -0500 |
---|---|---|
committer | Jason Cooper <jason@lakedaemon.net> | 2014-02-22 15:43:49 -0500 |
commit | 4b8f7a11c9fb680895e5079788653a59d6bdde16 (patch) | |
tree | d20f78bd55eb043f8f9e1be5e702301263b73079 /arch/arm/mm | |
parent | 3c317d00ba4a9489c161857a574432c61fde4a2a (diff) |
ARM: MM: Add DT binding for Feroceon L2 cache
Instantiate the L2 cache from DT. Indicate in DT where the cache
control register is so that it is possible to enable/disable write
through on the CPU.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/mm')
-rw-r--r-- | arch/arm/mm/cache-feroceon-l2.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c index 898362e7972b..8dc1a2b5a8ed 100644 --- a/arch/arm/mm/cache-feroceon-l2.c +++ b/arch/arm/mm/cache-feroceon-l2.c | |||
@@ -13,11 +13,16 @@ | |||
13 | */ | 13 | */ |
14 | 14 | ||
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/of.h> | ||
17 | #include <linux/of_address.h> | ||
16 | #include <linux/highmem.h> | 18 | #include <linux/highmem.h> |
19 | #include <linux/io.h> | ||
17 | #include <asm/cacheflush.h> | 20 | #include <asm/cacheflush.h> |
18 | #include <asm/cp15.h> | 21 | #include <asm/cp15.h> |
19 | #include <asm/hardware/cache-feroceon-l2.h> | 22 | #include <asm/hardware/cache-feroceon-l2.h> |
20 | 23 | ||
24 | #define L2_WRITETHROUGH_KIRKWOOD BIT(4) | ||
25 | |||
21 | /* | 26 | /* |
22 | * Low-level cache maintenance operations. | 27 | * Low-level cache maintenance operations. |
23 | * | 28 | * |
@@ -350,3 +355,41 @@ void __init feroceon_l2_init(int __l2_wt_override) | |||
350 | printk(KERN_INFO "Feroceon L2: Cache support initialised%s.\n", | 355 | printk(KERN_INFO "Feroceon L2: Cache support initialised%s.\n", |
351 | l2_wt_override ? ", in WT override mode" : ""); | 356 | l2_wt_override ? ", in WT override mode" : ""); |
352 | } | 357 | } |
358 | #ifdef CONFIG_OF | ||
359 | static const struct of_device_id feroceon_ids[] __initconst = { | ||
360 | { .compatible = "marvell,kirkwood-cache"}, | ||
361 | { .compatible = "marvell,feroceon-cache"}, | ||
362 | {} | ||
363 | }; | ||
364 | |||
365 | int __init feroceon_of_init(void) | ||
366 | { | ||
367 | struct device_node *node; | ||
368 | void __iomem *base; | ||
369 | bool l2_wt_override = false; | ||
370 | struct resource res; | ||
371 | |||
372 | #if defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH) | ||
373 | l2_wt_override = true; | ||
374 | #endif | ||
375 | |||
376 | node = of_find_matching_node(NULL, feroceon_ids); | ||
377 | if (node && of_device_is_compatible(node, "marvell,kirkwood-cache")) { | ||
378 | if (of_address_to_resource(node, 0, &res)) | ||
379 | return -ENODEV; | ||
380 | |||
381 | base = ioremap(res.start, resource_size(&res)); | ||
382 | if (!base) | ||
383 | return -ENOMEM; | ||
384 | |||
385 | if (l2_wt_override) | ||
386 | writel(readl(base) | L2_WRITETHROUGH_KIRKWOOD, base); | ||
387 | else | ||
388 | writel(readl(base) & ~L2_WRITETHROUGH_KIRKWOOD, base); | ||
389 | } | ||
390 | |||
391 | feroceon_l2_init(l2_wt_override); | ||
392 | |||
393 | return 0; | ||
394 | } | ||
395 | #endif | ||