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authorCatalin Marinas <catalin.marinas@arm.com>2005-10-05 18:06:36 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-10-05 18:06:36 -0400
commite03eb5272b670e5002463c95fdc023410ba18484 (patch)
treeabb775231d2871ade31006874a1541e397ff7d16 /arch/arm/mm
parentbb77c03cf40fec911c4ce9610b8207bf0050a5fd (diff)
[ARM] 2954/1: Allow D and I cache and branch prediction disabling for ARMv6
Patch from Catalin Marinas There is no reason to not allow these config options. They are useful when the hardware has problems. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm')
-rw-r--r--arch/arm/mm/Kconfig8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index db5e47dfc303..c54e04c995ee 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -370,21 +370,21 @@ config CPU_BIG_ENDIAN
370 370
371config CPU_ICACHE_DISABLE 371config CPU_ICACHE_DISABLE
372 bool "Disable I-Cache" 372 bool "Disable I-Cache"
373 depends on CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 373 depends on CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 || CPU_V6
374 help 374 help
375 Say Y here to disable the processor instruction cache. Unless 375 Say Y here to disable the processor instruction cache. Unless
376 you have a reason not to or are unsure, say N. 376 you have a reason not to or are unsure, say N.
377 377
378config CPU_DCACHE_DISABLE 378config CPU_DCACHE_DISABLE
379 bool "Disable D-Cache" 379 bool "Disable D-Cache"
380 depends on CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 380 depends on CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 || CPU_V6
381 help 381 help
382 Say Y here to disable the processor data cache. Unless 382 Say Y here to disable the processor data cache. Unless
383 you have a reason not to or are unsure, say N. 383 you have a reason not to or are unsure, say N.
384 384
385config CPU_DCACHE_WRITETHROUGH 385config CPU_DCACHE_WRITETHROUGH
386 bool "Force write through D-cache" 386 bool "Force write through D-cache"
387 depends on (CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020) && !CPU_DCACHE_DISABLE 387 depends on (CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 || CPU_V6) && !CPU_DCACHE_DISABLE
388 default y if CPU_ARM925T 388 default y if CPU_ARM925T
389 help 389 help
390 Say Y here to use the data cache in writethrough mode. Unless you 390 Say Y here to use the data cache in writethrough mode. Unless you
@@ -399,7 +399,7 @@ config CPU_CACHE_ROUND_ROBIN
399 399
400config CPU_BPREDICT_DISABLE 400config CPU_BPREDICT_DISABLE
401 bool "Disable branch prediction" 401 bool "Disable branch prediction"
402 depends on CPU_ARM1020 402 depends on CPU_ARM1020 || CPU_V6
403 help 403 help
404 Say Y here to disable branch prediction. If unsure, say N. 404 Say Y here to disable branch prediction. If unsure, say N.
405 405