diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-01 21:28:06 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-01 21:28:06 -0400 |
commit | 2a2bf85f05e42b12ea6bfe821e2d19221cf93555 (patch) | |
tree | 11abcdaef6e4f8307574056998d306d21558b6ed /arch/arm/mm | |
parent | 11801e9de26992d37cb869cc74f389b6a7677e0e (diff) | |
parent | 99261fbad0a16f105b262d7525801697588ba526 (diff) |
Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc device tree updates from Olof Johansson:
"Device tree conversion and enablement branch. Mostly a bunch of new
bindings and setup for various platforms, but the Via/Winchip VT8500
platform is also converted over from being 100% legacy to now use
device tree for probing. More of that will come for 3.8."
Trivial conflicts due to removal of vt8500 files, and one documentation
file that was added with slightly different contents both here and in
the USb tree.
* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (212 commits)
arm: vt8500: Fixup for missing gpio.h
ARM: LPC32xx: LED fix in PHY3250 DTS file
ARM: dt: mmp-dma: add binding file
arm: vt8500: Update arch-vt8500 to devicetree support.
arm: vt8500: gpio: Devicetree support for arch-vt8500
arm: vt8500: doc: Add device tree bindings for arch-vt8500 devices
arm: vt8500: clk: Add Common Clock Framework support
video: vt8500: Add devicetree support for vt8500-fb and wm8505-fb
serial: vt8500: Add devicetree support for vt8500-serial
rtc: vt8500: Add devicetree support for vt8500-rtc
arm: vt8500: Add device tree files for VIA/Wondermedia SoC's
ARM: tegra: Add Avionic Design Tamonten Evaluation Carrier support
ARM: tegra: Add Avionic Design Medcom-Wide support
ARM: tegra: Add Avionic Design Plutux support
ARM: tegra: Add Avionic Design Tamonten support
ARM: tegra: dts: Add pwm label
ARM: ux500: Fix SSP register address format
ARM: ux500: Apply tc3589x's GPIO/IRQ properties to HREF's DT
ARM: ux500: Remove redundant #gpio-cell properties from Snowball DT
ARM: ux500: Add all encompassing sound node to the HREF Device Tree
...
Diffstat (limited to 'arch/arm/mm')
-rw-r--r-- | arch/arm/mm/cache-tauros2.c | 83 |
1 files changed, 62 insertions, 21 deletions
diff --git a/arch/arm/mm/cache-tauros2.c b/arch/arm/mm/cache-tauros2.c index 23a7643e9a87..1be0f4e5e6eb 100644 --- a/arch/arm/mm/cache-tauros2.c +++ b/arch/arm/mm/cache-tauros2.c | |||
@@ -15,8 +15,11 @@ | |||
15 | */ | 15 | */ |
16 | 16 | ||
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | #include <linux/of.h> | ||
19 | #include <linux/of_address.h> | ||
18 | #include <asm/cacheflush.h> | 20 | #include <asm/cacheflush.h> |
19 | #include <asm/cp15.h> | 21 | #include <asm/cp15.h> |
22 | #include <asm/cputype.h> | ||
20 | #include <asm/hardware/cache-tauros2.h> | 23 | #include <asm/hardware/cache-tauros2.h> |
21 | 24 | ||
22 | 25 | ||
@@ -144,25 +147,8 @@ static inline void __init write_extra_features(u32 u) | |||
144 | __asm__("mcr p15, 1, %0, c15, c1, 0" : : "r" (u)); | 147 | __asm__("mcr p15, 1, %0, c15, c1, 0" : : "r" (u)); |
145 | } | 148 | } |
146 | 149 | ||
147 | static void __init disable_l2_prefetch(void) | ||
148 | { | ||
149 | u32 u; | ||
150 | |||
151 | /* | ||
152 | * Read the CPU Extra Features register and verify that the | ||
153 | * Disable L2 Prefetch bit is set. | ||
154 | */ | ||
155 | u = read_extra_features(); | ||
156 | if (!(u & 0x01000000)) { | ||
157 | printk(KERN_INFO "Tauros2: Disabling L2 prefetch.\n"); | ||
158 | write_extra_features(u | 0x01000000); | ||
159 | } | ||
160 | } | ||
161 | |||
162 | static inline int __init cpuid_scheme(void) | 150 | static inline int __init cpuid_scheme(void) |
163 | { | 151 | { |
164 | extern int processor_id; | ||
165 | |||
166 | return !!((processor_id & 0x000f0000) == 0x000f0000); | 152 | return !!((processor_id & 0x000f0000) == 0x000f0000); |
167 | } | 153 | } |
168 | 154 | ||
@@ -189,12 +175,36 @@ static inline void __init write_actlr(u32 actlr) | |||
189 | __asm__("mcr p15, 0, %0, c1, c0, 1\n" : : "r" (actlr)); | 175 | __asm__("mcr p15, 0, %0, c1, c0, 1\n" : : "r" (actlr)); |
190 | } | 176 | } |
191 | 177 | ||
192 | void __init tauros2_init(void) | 178 | static void enable_extra_feature(unsigned int features) |
179 | { | ||
180 | u32 u; | ||
181 | |||
182 | u = read_extra_features(); | ||
183 | |||
184 | if (features & CACHE_TAUROS2_PREFETCH_ON) | ||
185 | u &= ~0x01000000; | ||
186 | else | ||
187 | u |= 0x01000000; | ||
188 | printk(KERN_INFO "Tauros2: %s L2 prefetch.\n", | ||
189 | (features & CACHE_TAUROS2_PREFETCH_ON) | ||
190 | ? "Enabling" : "Disabling"); | ||
191 | |||
192 | if (features & CACHE_TAUROS2_LINEFILL_BURST8) | ||
193 | u |= 0x00100000; | ||
194 | else | ||
195 | u &= ~0x00100000; | ||
196 | printk(KERN_INFO "Tauros2: %s line fill burt8.\n", | ||
197 | (features & CACHE_TAUROS2_LINEFILL_BURST8) | ||
198 | ? "Enabling" : "Disabling"); | ||
199 | |||
200 | write_extra_features(u); | ||
201 | } | ||
202 | |||
203 | static void __init tauros2_internal_init(unsigned int features) | ||
193 | { | 204 | { |
194 | extern int processor_id; | 205 | char *mode = NULL; |
195 | char *mode; | ||
196 | 206 | ||
197 | disable_l2_prefetch(); | 207 | enable_extra_feature(features); |
198 | 208 | ||
199 | #ifdef CONFIG_CPU_32v5 | 209 | #ifdef CONFIG_CPU_32v5 |
200 | if ((processor_id & 0xff0f0000) == 0x56050000) { | 210 | if ((processor_id & 0xff0f0000) == 0x56050000) { |
@@ -286,3 +296,34 @@ void __init tauros2_init(void) | |||
286 | printk(KERN_INFO "Tauros2: L2 cache support initialised " | 296 | printk(KERN_INFO "Tauros2: L2 cache support initialised " |
287 | "in %s mode.\n", mode); | 297 | "in %s mode.\n", mode); |
288 | } | 298 | } |
299 | |||
300 | #ifdef CONFIG_OF | ||
301 | static const struct of_device_id tauros2_ids[] __initconst = { | ||
302 | { .compatible = "marvell,tauros2-cache"}, | ||
303 | {} | ||
304 | }; | ||
305 | #endif | ||
306 | |||
307 | void __init tauros2_init(unsigned int features) | ||
308 | { | ||
309 | #ifdef CONFIG_OF | ||
310 | struct device_node *node; | ||
311 | int ret; | ||
312 | unsigned int f; | ||
313 | |||
314 | node = of_find_matching_node(NULL, tauros2_ids); | ||
315 | if (!node) { | ||
316 | pr_info("Not found marvell,tauros2-cache, disable it\n"); | ||
317 | return; | ||
318 | } | ||
319 | |||
320 | ret = of_property_read_u32(node, "marvell,tauros2-cache-features", &f); | ||
321 | if (ret) { | ||
322 | pr_info("Not found marvell,tauros-cache-features property, " | ||
323 | "disable extra features\n"); | ||
324 | features = 0; | ||
325 | } else | ||
326 | features = f; | ||
327 | #endif | ||
328 | tauros2_internal_init(features); | ||
329 | } | ||