Merge branch 'mcpm' of git://git.linaro.org/people/nico/linux into devel-stable

4 files changed, 23 insertions, 14 deletions

diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index 7a0511191f6b..a5a4b2bc42ba 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -152,9 +152,9 @@ static int is_reserved_asid(u64 asid)
         return 0;
 }
 
-static void new_context(struct mm_struct *mm, unsigned int cpu)
+static u64 new_context(struct mm_struct *mm, unsigned int cpu)
 {
-        u64 asid = mm->context.id;
+        u64 asid = atomic64_read(&mm->context.id);
         u64 generation = atomic64_read(&asid_generation);
 
         if (asid != 0 && is_reserved_asid(asid)) {
@@ -181,13 +181,14 @@ static void new_context(struct mm_struct *mm, unsigned int cpu)
                 cpumask_clear(mm_cpumask(mm));
         }
 
-        mm->context.id = asid;
+        return asid;
 }
 
 void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk)
 {
         unsigned long flags;
         unsigned int cpu = smp_processor_id();
+        u64 asid;
 
         if (unlikely(mm->context.vmalloc_seq != init_mm.context.vmalloc_seq))
                 __check_vmalloc_seq(mm);
@@ -198,20 +199,26 @@ void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk)
          */
         cpu_set_reserved_ttbr0();
 
-        if (!((mm->context.id ^ atomic64_read(&asid_generation)) >> ASID_BITS)
-            && atomic64_xchg(&per_cpu(active_asids, cpu), mm->context.id))
+        asid = atomic64_read(&mm->context.id);
+        if (!((asid ^ atomic64_read(&asid_generation)) >> ASID_BITS)
+            && atomic64_xchg(&per_cpu(active_asids, cpu), asid))
                 goto switch_mm_fastpath;
 
         raw_spin_lock_irqsave(&cpu_asid_lock, flags);
         /* Check that our ASID belongs to the current generation. */
-        if ((mm->context.id ^ atomic64_read(&asid_generation)) >> ASID_BITS)
-                new_context(mm, cpu);
-
-        atomic64_set(&per_cpu(active_asids, cpu), mm->context.id);
-        cpumask_set_cpu(cpu, mm_cpumask(mm));
+        asid = atomic64_read(&mm->context.id);
+        if ((asid ^ atomic64_read(&asid_generation)) >> ASID_BITS) {
+                asid = new_context(mm, cpu);
+                atomic64_set(&mm->context.id, asid);
+        }
 
-        if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending))
+        if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending)) {
+                local_flush_bp_all();
                 local_flush_tlb_all();
+        }
+
+        atomic64_set(&per_cpu(active_asids, cpu), asid);
+        cpumask_set_cpu(cpu, mm_cpumask(mm));
         raw_spin_unlock_irqrestore(&cpu_asid_lock, flags);
 
 switch_mm_fastpath:
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index c7e3759f16d3..e9db6b4bf65a 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -342,6 +342,7 @@ static int __init atomic_pool_init(void)
 {
         struct dma_pool *pool = &atomic_pool;
         pgprot_t prot = pgprot_dmacoherent(pgprot_kernel);
+        gfp_t gfp = GFP_KERNEL | GFP_DMA;
         unsigned long nr_pages = pool->size >> PAGE_SHIFT;
         unsigned long *bitmap;
         struct page *page;
@@ -361,8 +362,8 @@ static int __init atomic_pool_init(void)
                 ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page,
                                               atomic_pool_init);
         else
-                ptr = __alloc_remap_buffer(NULL, pool->size, GFP_KERNEL, prot,
-                                           &page, atomic_pool_init);
+                ptr = __alloc_remap_buffer(NULL, pool->size, gfp, prot, &page,
+                                           atomic_pool_init);
         if (ptr) {
                 int i;
 
diff --git a/arch/arm/mm/idmap.c b/arch/arm/mm/idmap.c
index 2dffc010cc41..5ee505c937d1 100644
--- a/arch/arm/mm/idmap.c
+++ b/arch/arm/mm/idmap.c
@@ -141,6 +141,7 @@ void setup_mm_for_reboot(void)
 {
         /* Switch to the identity mapping. */
         cpu_switch_mm(idmap_pgd, &init_mm);
+        local_flush_bp_all();
 
 #ifdef CONFIG_CPU_HAS_ASID
         /*
diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
index 50bf1dafc9ea..6ffd78c0f9ab 100644
--- a/arch/arm/mm/proc-v7-3level.S
+++ b/arch/arm/mm/proc-v7-3level.S
@@ -48,7 +48,7 @@
 ENTRY(cpu_v7_switch_mm)
 #ifdef CONFIG_MMU
         mmid    r1, r1                          @ get mm->context.id
-        and     r3, r1, #0xff
+        asid    r3, r1
         mov     r3, r3, lsl #(48 - 32)          @ ASID
         mcrr    p15, 0, r0, r3, c2              @ set TTB 0
         isb