Merge branch 'linus' into perf/core

Merge reason: pick up tools/perf/ changes from upstream.

Signed-off-by: Ingo Molnar <mingo@elte.hu>

6 files changed, 46 insertions, 11 deletions

diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index 8f5c13f4c936..295e25dd6381 100644
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -12,6 +12,7 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 #include <asm/assembler.h>
+#include <asm/unwind.h>
 
 #include "proc-macros.S"
 
@@ -121,11 +122,13 @@ ENTRY(v6_coherent_kern_range)
  *      - the Icache does not read data from the write buffer
  */
 ENTRY(v6_coherent_user_range)
-
+ UNWIND(.fnstart                )
 #ifdef HARVARD_CACHE
         bic     r0, r0, #CACHE_LINE_SIZE - 1
-1:      mcr     p15, 0, r0, c7, c10, 1          @ clean D line
+1:
+ USER(  mcr     p15, 0, r0, c7, c10, 1  )       @ clean D line
         add     r0, r0, #CACHE_LINE_SIZE
+2:
         cmp     r0, r1
         blo     1b
 #endif
@@ -143,6 +146,19 @@ ENTRY(v6_coherent_user_range)
         mov     pc, lr
 
 /*
+ * Fault handling for the cache operation above. If the virtual address in r0
+ * isn't mapped, just try the next page.
+ */
+9001:
+        mov     r0, r0, lsr #12
+        mov     r0, r0, lsl #12
+        add     r0, r0, #4096
+        b       2b
+ UNWIND(.fnend          )
+ENDPROC(v6_coherent_user_range)
+ENDPROC(v6_coherent_kern_range)
+
+/*
  *      v6_flush_kern_dcache_page(kaddr)
  *
  *      Ensure that the data held in the page kaddr is written back
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index bda0ec31a4e2..e1bd9759617f 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -13,6 +13,7 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 #include <asm/assembler.h>
+#include <asm/unwind.h>
 
 #include "proc-macros.S"
 
@@ -153,13 +154,16 @@ ENTRY(v7_coherent_kern_range)
  *      - the Icache does not read data from the write buffer
  */
 ENTRY(v7_coherent_user_range)
+ UNWIND(.fnstart                )
         dcache_line_size r2, r3
         sub     r3, r2, #1
         bic     r0, r0, r3
-1:      mcr     p15, 0, r0, c7, c11, 1          @ clean D line to the point of unification
+1:
+ USER(  mcr     p15, 0, r0, c7, c11, 1  )       @ clean D line to the point of unification
         dsb
-        mcr     p15, 0, r0, c7, c5, 1           @ invalidate I line
+ USER(  mcr     p15, 0, r0, c7, c5, 1   )       @ invalidate I line
         add     r0, r0, r2
+2:
         cmp     r0, r1
         blo     1b
         mov     r0, #0
@@ -167,6 +171,17 @@ ENTRY(v7_coherent_user_range)
         dsb
         isb
         mov     pc, lr
+
+/*
+ * Fault handling for the cache operation above. If the virtual address in r0
+ * isn't mapped, just try the next page.
+ */
+9001:
+        mov     r0, r0, lsr #12
+        mov     r0, r0, lsl #12
+        add     r0, r0, #4096
+        b       2b
+ UNWIND(.fnend          )
 ENDPROC(v7_coherent_kern_range)
 ENDPROC(v7_coherent_user_range)
 
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c
index bc0099d5ae85..d0d17b6a3703 100644
--- a/arch/arm/mm/fault-armv.c
+++ b/arch/arm/mm/fault-armv.c
@@ -153,14 +153,11 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
 
         page = pfn_to_page(pfn);
         mapping = page_mapping(page);
-        if (mapping) {
 #ifndef CONFIG_SMP
-                int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags);
-
-                if (dirty)
-                        __flush_dcache_page(mapping, page);
+        if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
+                __flush_dcache_page(mapping, page);
 #endif
-
+        if (mapping) {
                 if (cache_is_vivt())
                         make_coherent(mapping, vma, addr, pfn);
                 else if (vma->vm_flags & VM_EXEC)
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index ae0e25f5a70e..10e06801afb3 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -292,6 +292,11 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
                  * down_read()
                  */
                 might_sleep();
+#ifdef CONFIG_DEBUG_VM
+                if (!user_mode(regs) &&
+                    !search_exception_tables(regs->ARM_pc))
+                        goto no_context;
+#endif
         }
 
         fault = __do_page_fault(mm, addr, fsr, tsk);
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c
index 73cae57fa707..30f82fb5918c 100644
--- a/arch/arm/mm/highmem.c
+++ b/arch/arm/mm/highmem.c
@@ -46,6 +46,8 @@ void *kmap_atomic(struct page *page, enum km_type type)
         if (!PageHighMem(page))
                 return page_address(page);
 
+        debug_kmap_atomic(type);
+
         kmap = kmap_high_get(page);
         if (kmap)
                 return kmap;
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 877c492f8e10..40940d7ce4ff 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -483,7 +483,7 @@ free_memmap(int node, unsigned long start_pfn, unsigned long end_pfn)
         /*
          * Convert start_pfn/end_pfn to a struct page pointer.
          */
-        start_pg = pfn_to_page(start_pfn);
+        start_pg = pfn_to_page(start_pfn - 1) + 1;
         end_pg = pfn_to_page(end_pfn);
 
         /*