Merge /spare/repo/linux-2.6/

3 files changed, 72 insertions, 36 deletions

diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 81f4a8a2d34b..4b39d867ac14 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -45,7 +45,7 @@
 
 #define LDST_P_EQ_U(i)  ((((i) ^ ((i) >> 1)) & (1 << 23)) == 0)
 
-#define LDSTH_I_BIT(i)  (i & (1 << 22))         /* half-word immed      */
+#define LDSTHD_I_BIT(i) (i & (1 << 22))         /* double/half-word immed */
 #define LDM_S_BIT(i)    (i & (1 << 22))         /* write CPSR from SPSR */
 
 #define RN_BITS(i)      ((i >> 16) & 15)        /* Rn                   */
@@ -68,6 +68,7 @@ static unsigned long ai_sys;
 static unsigned long ai_skipped;
 static unsigned long ai_half;
 static unsigned long ai_word;
+static unsigned long ai_dword;
 static unsigned long ai_multi;
 static int ai_usermode;
 
@@ -93,6 +94,8 @@ proc_alignment_read(char *page, char **start, off_t off, int count, int *eof,
         p += sprintf(p, "Skipped:\t%lu\n", ai_skipped);
         p += sprintf(p, "Half:\t\t%lu\n", ai_half);
         p += sprintf(p, "Word:\t\t%lu\n", ai_word);
+        if (cpu_architecture() >= CPU_ARCH_ARMv5TE)
+                p += sprintf(p, "DWord:\t\t%lu\n", ai_dword);
         p += sprintf(p, "Multi:\t\t%lu\n", ai_multi);
         p += sprintf(p, "User faults:\t%i (%s)\n", ai_usermode,
                         usermode_action[ai_usermode]);
@@ -283,12 +286,6 @@ do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *r
 {
         unsigned int rd = RD_BITS(instr);
 
-        if ((instr & 0x01f00ff0) == 0x01000090)
-                goto swp;
-
-        if ((instr & 0x90) != 0x90 || (instr & 0x60) == 0)
-                goto bad;
-
         ai_half += 1;
 
         if (user_mode(regs))
@@ -323,10 +320,47 @@ do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *r
 
         return TYPE_LDST;
 
- swp:
-        printk(KERN_ERR "Alignment trap: not handling swp instruction\n");
- bad:
-        return TYPE_ERROR;
+ fault:
+        return TYPE_FAULT;
+}
+
+static int
+do_alignment_ldrdstrd(unsigned long addr, unsigned long instr,
+                      struct pt_regs *regs)
+{
+        unsigned int rd = RD_BITS(instr);
+
+        ai_dword += 1;
+
+        if (user_mode(regs))
+                goto user;
+
+        if ((instr & 0xf0) == 0xd0) {
+                unsigned long val;
+                get32_unaligned_check(val, addr);
+                regs->uregs[rd] = val;
+                get32_unaligned_check(val, addr+4);
+                regs->uregs[rd+1] = val;
+        } else {
+                put32_unaligned_check(regs->uregs[rd], addr);
+                put32_unaligned_check(regs->uregs[rd+1], addr+4);
+        }
+
+        return TYPE_LDST;
+
+ user:
+        if ((instr & 0xf0) == 0xd0) {
+                unsigned long val;
+                get32t_unaligned_check(val, addr);
+                regs->uregs[rd] = val;
+                get32t_unaligned_check(val, addr+4);
+                regs->uregs[rd+1] = val;
+        } else {
+                put32t_unaligned_check(regs->uregs[rd], addr);
+                put32t_unaligned_check(regs->uregs[rd+1], addr+4);
+        }
+
+        return TYPE_LDST;
 
  fault:
         return TYPE_FAULT;
@@ -617,12 +651,20 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
         regs->ARM_pc += thumb_mode(regs) ? 2 : 4;
 
         switch (CODING_BITS(instr)) {
-        case 0x00000000:        /* ldrh or strh */
-                if (LDSTH_I_BIT(instr))
+        case 0x00000000:        /* 3.13.4 load/store instruction extensions */
+                if (LDSTHD_I_BIT(instr))
                         offset.un = (instr & 0xf00) >> 4 | (instr & 15);
                 else
                         offset.un = regs->uregs[RM_BITS(instr)];
-                handler = do_alignment_ldrhstrh;
+
+                if ((instr & 0x000000f0) == 0x000000b0 || /* LDRH, STRH */
+                    (instr & 0x001000f0) == 0x001000f0)   /* LDRSH */
+                        handler = do_alignment_ldrhstrh;
+                else if ((instr & 0x001000f0) == 0x000000d0 || /* LDRD */
+                         (instr & 0x001000f0) == 0x000000f0)   /* STRD */
+                        handler = do_alignment_ldrdstrd;
+                else
+                        goto bad;
                 break;
 
         case 0x04000000:        /* ldr or str immediate */
diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c
index 3c655c54e231..d125a3dc061c 100644
--- a/arch/arm/mm/mm-armv.c
+++ b/arch/arm/mm/mm-armv.c
@@ -275,11 +275,9 @@ alloc_init_supersection(unsigned long virt, unsigned long phys, int prot)
         int i;
 
         for (i = 0; i < 16; i += 1) {
-                alloc_init_section(virt, phys & SUPERSECTION_MASK,
-                                   prot | PMD_SECT_SUPER);
+                alloc_init_section(virt, phys, prot | PMD_SECT_SUPER);
 
                 virt += (PGDIR_SIZE / 2);
-                phys += (PGDIR_SIZE / 2);
         }
 }
 
@@ -297,14 +295,10 @@ alloc_init_page(unsigned long virt, unsigned long phys, unsigned int prot_l1, pg
         pte_t *ptep;
 
         if (pmd_none(*pmdp)) {
-                unsigned long pmdval;
                 ptep = alloc_bootmem_low_pages(2 * PTRS_PER_PTE *
                                                sizeof(pte_t));
 
-                pmdval = __pa(ptep) | prot_l1;
-                pmdp[0] = __pmd(pmdval);
-                pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t));
-                flush_pmd_entry(pmdp);
+                __pmd_populate(pmdp, __pa(ptep) | prot_l1);
         }
         ptep = pte_offset_kernel(pmdp, virt);
 
@@ -459,7 +453,7 @@ static void __init build_mem_type_table(void)
 
         for (i = 0; i < 16; i++) {
                 unsigned long v = pgprot_val(protection_map[i]);
-                v &= (~(PTE_BUFFERABLE|PTE_CACHEABLE)) | user_pgprot;
+                v = (v & ~(PTE_BUFFERABLE|PTE_CACHEABLE)) | user_pgprot;
                 protection_map[i] = __pgprot(v);
         }
 
@@ -583,23 +577,23 @@ static void __init create_mapping(struct map_desc *md)
  */
 void setup_mm_for_reboot(char mode)
 {
-        unsigned long pmdval;
+        unsigned long base_pmdval;
         pgd_t *pgd;
-        pmd_t *pmd;
         int i;
-        int cpu_arch = cpu_architecture();
 
         if (current->mm && current->mm->pgd)
                 pgd = current->mm->pgd;
         else
                 pgd = init_mm.pgd;
 
-        for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++) {
-                pmdval = (i << PGDIR_SHIFT) |
-                         PMD_SECT_AP_WRITE | PMD_SECT_AP_READ |
-                         PMD_TYPE_SECT;
-                if (cpu_arch <= CPU_ARCH_ARMv5TEJ)
-                        pmdval |= PMD_BIT4;
+        base_pmdval = PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT;
+        if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ)
+                base_pmdval |= PMD_BIT4;
+
+        for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++, pgd++) {
+                unsigned long pmdval = (i << PGDIR_SHIFT) | base_pmdval;
+                pmd_t *pmd;
+
                 pmd = pmd_off(pgd, i << PGDIR_SHIFT);
                 pmd[0] = __pmd(pmdval);
                 pmd[1] = __pmd(pmdval + (1 << (PGDIR_SHIFT - 1)));
diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S
index 0ee214b824ff..189ef6a71ba1 100644
--- a/arch/arm/mm/proc-arm6_7.S
+++ b/arch/arm/mm/proc-arm6_7.S
@@ -38,8 +38,8 @@ ENTRY(cpu_arm7_data_abort)
         mrc     p15, 0, r1, c5, c0, 0           @ get FSR
         mrc     p15, 0, r0, c6, c0, 0           @ get FAR
         ldr     r8, [r0]                        @ read arm instruction
-        tst     r8, #1 << 20                    @ L = 1 -> write?
-        orreq   r1, r1, #1 << 8                 @ yes.
+        tst     r8, #1 << 20                    @ L = 0 -> write?
+        orreq   r1, r1, #1 << 11                @ yes.
         and     r7, r8, #15 << 24
         add     pc, pc, r7, lsr #22             @ Now branch to the relevant processing routine
         nop
@@ -71,8 +71,8 @@ ENTRY(cpu_arm6_data_abort)
         mrc     p15, 0, r1, c5, c0, 0           @ get FSR
         mrc     p15, 0, r0, c6, c0, 0           @ get FAR
         ldr     r8, [r2]                        @ read arm instruction
-        tst     r8, #1 << 20                    @ L = 1 -> write?
-        orreq   r1, r1, #1 << 8                 @ yes.
+        tst     r8, #1 << 20                    @ L = 0 -> write?
+        orreq   r1, r1, #1 << 11                @ yes.
         and     r7, r8, #14 << 24
         teq     r7, #8 << 24                    @ was it ldm/stm
         movne   pc, lr