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authorTomasz Figa <t.figa@samsung.com>2015-01-08 01:52:38 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2015-01-16 09:35:35 -0500
commitcf0681ca4cc5c9faa85a2df4c063b926fc09c977 (patch)
tree1671b2131639786941e2fbdcac2479204db29565 /arch/arm/mm
parent0c4c2edcaeee323fcc4f41a862456358eda50b57 (diff)
ARM: 8262/1: l2c: Add support for overriding prefetch settings
Firmware on certain boards (e.g. ODROID-U3) can leave incorrect L2C prefetch settings configured in registers leading to crashes if L2C is enabled without overriding them. This patch introduces bindings to enable prefetch settings to be specified from DT and necessary support in the driver. [mszyprow: rebased onto v3.18-rc1, added error message when prefetch related dt property has been provided without any value] Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm')
-rw-r--r--arch/arm/mm/cache-l2x0.c54
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 5288153f28b8..01de13809454 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -1169,6 +1169,8 @@ static void __init l2c310_of_parse(const struct device_node *np,
1169 u32 tag[3] = { 0, 0, 0 }; 1169 u32 tag[3] = { 0, 0, 0 };
1170 u32 filter[2] = { 0, 0 }; 1170 u32 filter[2] = { 0, 0 };
1171 u32 assoc; 1171 u32 assoc;
1172 u32 prefetch;
1173 u32 val;
1172 int ret; 1174 int ret;
1173 1175
1174 of_property_read_u32_array(np, "arm,tag-latency", tag, ARRAY_SIZE(tag)); 1176 of_property_read_u32_array(np, "arm,tag-latency", tag, ARRAY_SIZE(tag));
@@ -1214,6 +1216,58 @@ static void __init l2c310_of_parse(const struct device_node *np,
1214 assoc); 1216 assoc);
1215 break; 1217 break;
1216 } 1218 }
1219
1220 prefetch = l2x0_saved_regs.prefetch_ctrl;
1221
1222 ret = of_property_read_u32(np, "arm,double-linefill", &val);
1223 if (ret == 0) {
1224 if (val)
1225 prefetch |= L310_PREFETCH_CTRL_DBL_LINEFILL;
1226 else
1227 prefetch &= ~L310_PREFETCH_CTRL_DBL_LINEFILL;
1228 } else if (ret != -EINVAL) {
1229 pr_err("L2C-310 OF arm,double-linefill property value is missing\n");
1230 }
1231
1232 ret = of_property_read_u32(np, "arm,double-linefill-incr", &val);
1233 if (ret == 0) {
1234 if (val)
1235 prefetch |= L310_PREFETCH_CTRL_DBL_LINEFILL_INCR;
1236 else
1237 prefetch &= ~L310_PREFETCH_CTRL_DBL_LINEFILL_INCR;
1238 } else if (ret != -EINVAL) {
1239 pr_err("L2C-310 OF arm,double-linefill-incr property value is missing\n");
1240 }
1241
1242 ret = of_property_read_u32(np, "arm,double-linefill-wrap", &val);
1243 if (ret == 0) {
1244 if (!val)
1245 prefetch |= L310_PREFETCH_CTRL_DBL_LINEFILL_WRAP;
1246 else
1247 prefetch &= ~L310_PREFETCH_CTRL_DBL_LINEFILL_WRAP;
1248 } else if (ret != -EINVAL) {
1249 pr_err("L2C-310 OF arm,double-linefill-wrap property value is missing\n");
1250 }
1251
1252 ret = of_property_read_u32(np, "arm,prefetch-drop", &val);
1253 if (ret == 0) {
1254 if (val)
1255 prefetch |= L310_PREFETCH_CTRL_PREFETCH_DROP;
1256 else
1257 prefetch &= ~L310_PREFETCH_CTRL_PREFETCH_DROP;
1258 } else if (ret != -EINVAL) {
1259 pr_err("L2C-310 OF arm,prefetch-drop property value is missing\n");
1260 }
1261
1262 ret = of_property_read_u32(np, "arm,prefetch-offset", &val);
1263 if (ret == 0) {
1264 prefetch &= ~L310_PREFETCH_CTRL_OFFSET_MASK;
1265 prefetch |= val & L310_PREFETCH_CTRL_OFFSET_MASK;
1266 } else if (ret != -EINVAL) {
1267 pr_err("L2C-310 OF arm,prefetch-offset property value is missing\n");
1268 }
1269
1270 l2x0_saved_regs.prefetch_ctrl = prefetch;
1217} 1271}
1218 1272
1219static const struct l2c_init_data of_l2c310_data __initconst = { 1273static const struct l2c_init_data of_l2c310_data __initconst = {