diff options
author | Catalin Marinas <catalin.marinas@arm.com> | 2005-06-24 16:27:39 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2005-06-24 16:27:39 -0400 |
commit | 79042f087b5ac7bba819de03dc3e7462bab8aad9 (patch) | |
tree | 0fb7ca4b0d690d59a4a0d5bc6774a345edb43284 /arch/arm/mm | |
parent | 5932ae3f5d610fd8d047ef4693bab9f084e5c56d (diff) |
[PATCH] ARM: 2698/1: Enable kernel r/w access to user pages on ARMv6
Patch from Catalin Marinas
cpu_v6_set_pte() sets the kernel access rights to r/o for user
pages (L_PTE_USER) when neither L_PTE_WRITE nor L_PTE_DIRTY are
set. This causes a kernel data abort when writing the TLS value
in the 0xffff0000 page. This patch enables the kernel r/w access.
Signed-off-by: Catalin Marinas
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm')
-rw-r--r-- | arch/arm/mm/proc-v6.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 0aa73d414783..e3d8510f4340 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S | |||
@@ -132,8 +132,8 @@ ENTRY(cpu_v6_switch_mm) | |||
132 | * 100x 1 0 1 r/o no acc | 132 | * 100x 1 0 1 r/o no acc |
133 | * 10x0 1 0 1 r/o no acc | 133 | * 10x0 1 0 1 r/o no acc |
134 | * 1011 0 0 1 r/w no acc | 134 | * 1011 0 0 1 r/w no acc |
135 | * 110x 1 1 0 r/o r/o | 135 | * 110x 0 1 0 r/w r/o |
136 | * 11x0 1 1 0 r/o r/o | 136 | * 11x0 0 1 0 r/w r/o |
137 | * 1111 0 1 1 r/w r/w | 137 | * 1111 0 1 1 r/w r/w |
138 | */ | 138 | */ |
139 | ENTRY(cpu_v6_set_pte) | 139 | ENTRY(cpu_v6_set_pte) |
@@ -150,7 +150,7 @@ ENTRY(cpu_v6_set_pte) | |||
150 | tst r1, #L_PTE_USER | 150 | tst r1, #L_PTE_USER |
151 | orrne r2, r2, #AP1 | nG | 151 | orrne r2, r2, #AP1 | nG |
152 | tstne r2, #APX | 152 | tstne r2, #APX |
153 | eorne r2, r2, #AP0 | 153 | bicne r2, r2, #APX | AP0 |
154 | 154 | ||
155 | tst r1, #L_PTE_YOUNG | 155 | tst r1, #L_PTE_YOUNG |
156 | biceq r2, r2, #APX | AP1 | AP0 | 156 | biceq r2, r2, #APX | AP1 | AP0 |