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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-21 13:00:22 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-21 13:00:22 -0400
commitd07b3c25327c5ae3792d0ed0c135dee4727200a1 (patch)
tree2ffad8da1f9004bdeb32bf76faa08fa104797b89 /arch/arm/mm
parentdde33348e53ecab687a9768bf5262f0b8f79b7f2 (diff)
parent6cbdc8c5357276307a77deeada3f04626ff17da6 (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (22 commits) [ARM] spelling fixes [ARM] at91_adc parenthesis balance [ARM] 4400/1: S3C24XX: Add high-speed MMC device definition [ARM] 4399/2: S3C2443: Fix SMDK2443 nand timings [ARM] 4398/1: S3C2443: Fix watchdog IRQ number [ARM] 4397/1: S3C2443: remove SDI0/1 IRQ ambiguity [ARM] 4396/1: S3C2443: Add missing HCLK clocks [ARM] 4395/1: S3C24XX: add include of <linux/sysdev.h> to relevant machines [ARM] 4388/1: no need for arm/mm mmap range checks for non-mmu [ARM] 4387/1: fix /proc/cpuinfo formatting for pre-ARM7 parts [ARM] ARMv6: add CPU_HAS_ASID configuration [ARM] integrator: fix pci_v3 compile error with DEBUG_LL [ARM] gic: Fix gic cascade irq handling [ARM] Silence OMAP kernel configuration warning [ARM] Update ARM syscalls [ARM] 4384/1: S3C2412/13 SPI registers offset correction [ARM] 4383/1: iop: fix usage of '__init' and 'inline' in iop files [ARM] 4382/1: iop13xx: fix msi support [ARM] Remove Integrator/CP SMP platform support [ARM] 4378/1: KS8695: Serial driver fix ...
Diffstat (limited to 'arch/arm/mm')
-rw-r--r--arch/arm/mm/Kconfig8
-rw-r--r--arch/arm/mm/alignment.c2
-rw-r--r--arch/arm/mm/ioremap.c2
-rw-r--r--arch/arm/mm/mmu.c2
4 files changed, 11 insertions, 3 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 15f0284010ca..5f472a8b406a 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -351,6 +351,7 @@ config CPU_V6
351 select CPU_CACHE_V6 351 select CPU_CACHE_V6
352 select CPU_CACHE_VIPT 352 select CPU_CACHE_VIPT
353 select CPU_CP15_MMU 353 select CPU_CP15_MMU
354 select CPU_HAS_ASID
354 select CPU_COPY_V6 if MMU 355 select CPU_COPY_V6 if MMU
355 select CPU_TLB_V6 if MMU 356 select CPU_TLB_V6 if MMU
356 357
@@ -376,6 +377,7 @@ config CPU_V7
376 select CPU_CACHE_V7 377 select CPU_CACHE_V7
377 select CPU_CACHE_VIPT 378 select CPU_CACHE_VIPT
378 select CPU_CP15_MMU 379 select CPU_CP15_MMU
380 select CPU_HAS_ASID
379 select CPU_COPY_V6 if MMU 381 select CPU_COPY_V6 if MMU
380 select CPU_TLB_V6 if MMU 382 select CPU_TLB_V6 if MMU
381 383
@@ -498,6 +500,12 @@ config CPU_TLB_V6
498 500
499endif 501endif
500 502
503config CPU_HAS_ASID
504 bool
505 help
506 This indicates whether the CPU has the ASID register; used to
507 tag TLB and possibly cache entries.
508
501config CPU_CP15 509config CPU_CP15
502 bool 510 bool
503 help 511 help
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 19ca333240ec..36440c899583 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 1995 Linus Torvalds 4 * Copyright (C) 1995 Linus Torvalds
5 * Modifications for ARM processor (c) 1995-2001 Russell King 5 * Modifications for ARM processor (c) 1995-2001 Russell King
6 * Thumb aligment fault fixups (c) 2004 MontaVista Software, Inc. 6 * Thumb alignment fault fixups (c) 2004 MontaVista Software, Inc.
7 * - Adapted from gdb/sim/arm/thumbemu.c -- Thumb instruction emulation. 7 * - Adapted from gdb/sim/arm/thumbemu.c -- Thumb instruction emulation.
8 * Copyright (C) 1996, Cygnus Software Technologies Ltd. 8 * Copyright (C) 1996, Cygnus Software Technologies Ltd.
9 * 9 *
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index d6167ad4e011..f3ade18862aa 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -346,7 +346,7 @@ void __iounmap(volatile void __iomem *addr)
346#ifndef CONFIG_SMP 346#ifndef CONFIG_SMP
347 /* 347 /*
348 * If this is a section based mapping we need to handle it 348 * If this is a section based mapping we need to handle it
349 * specially as the VM subysystem does not know how to handle 349 * specially as the VM subsystem does not know how to handle
350 * such a beast. We need the lock here b/c we need to clear 350 * such a beast. We need the lock here b/c we need to clear
351 * all the mappings before the area can be reclaimed 351 * all the mappings before the area can be reclaimed
352 * by someone else. 352 * by someone else.
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 2ba1530d1ce1..02e050ae59f6 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -92,7 +92,7 @@ static struct cachepolicy cache_policies[] __initdata = {
92}; 92};
93 93
94/* 94/*
95 * These are useful for identifing cache coherency 95 * These are useful for identifying cache coherency
96 * problems by allowing the cache or the cache and 96 * problems by allowing the cache or the cache and
97 * writebuffer to be turned off. (Note: the write 97 * writebuffer to be turned off. (Note: the write
98 * buffer should not be on and the cache off). 98 * buffer should not be on and the cache off).