diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-09-21 03:48:33 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-09-21 03:48:33 -0400 |
commit | f70cac8d9c7125f83048f8b3d1c60f5a041a165c (patch) | |
tree | 0d0efd72c1a41f973a919b16aac1d8210ed1ee30 /arch/arm/mm | |
parent | 4722cd7741c6404f967f7a7b8b666540b6c1663e (diff) | |
parent | 08aab447c56a5388cf0c768da476ad022f00fef8 (diff) |
Merge branch 'kprobes-test' of git://git.yxit.co.uk/linux into devel-stable
Diffstat (limited to 'arch/arm/mm')
-rw-r--r-- | arch/arm/mm/abort-macro.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/cache-l2x0.c | 21 | ||||
-rw-r--r-- | arch/arm/mm/init.c | 2 |
3 files changed, 23 insertions, 2 deletions
diff --git a/arch/arm/mm/abort-macro.S b/arch/arm/mm/abort-macro.S index 52162d59407a..2cbf68ef0e83 100644 --- a/arch/arm/mm/abort-macro.S +++ b/arch/arm/mm/abort-macro.S | |||
@@ -17,7 +17,7 @@ | |||
17 | cmp \tmp, # 0x5600 @ Is it ldrsb? | 17 | cmp \tmp, # 0x5600 @ Is it ldrsb? |
18 | orreq \tmp, \tmp, #1 << 11 @ Set L-bit if yes | 18 | orreq \tmp, \tmp, #1 << 11 @ Set L-bit if yes |
19 | tst \tmp, #1 << 11 @ L = 0 -> write | 19 | tst \tmp, #1 << 11 @ L = 0 -> write |
20 | orreq \psr, \psr, #1 << 11 @ yes. | 20 | orreq \fsr, \fsr, #1 << 11 @ yes. |
21 | b do_DataAbort | 21 | b do_DataAbort |
22 | not_thumb: | 22 | not_thumb: |
23 | .endm | 23 | .endm |
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 44c086710d2b..9ecfdb511951 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c | |||
@@ -277,6 +277,25 @@ static void l2x0_disable(void) | |||
277 | spin_unlock_irqrestore(&l2x0_lock, flags); | 277 | spin_unlock_irqrestore(&l2x0_lock, flags); |
278 | } | 278 | } |
279 | 279 | ||
280 | static void __init l2x0_unlock(__u32 cache_id) | ||
281 | { | ||
282 | int lockregs; | ||
283 | int i; | ||
284 | |||
285 | if (cache_id == L2X0_CACHE_ID_PART_L310) | ||
286 | lockregs = 8; | ||
287 | else | ||
288 | /* L210 and unknown types */ | ||
289 | lockregs = 1; | ||
290 | |||
291 | for (i = 0; i < lockregs; i++) { | ||
292 | writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE + | ||
293 | i * L2X0_LOCKDOWN_STRIDE); | ||
294 | writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE + | ||
295 | i * L2X0_LOCKDOWN_STRIDE); | ||
296 | } | ||
297 | } | ||
298 | |||
280 | void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) | 299 | void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) |
281 | { | 300 | { |
282 | __u32 aux; | 301 | __u32 aux; |
@@ -328,6 +347,8 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) | |||
328 | * accessing the below registers will fault. | 347 | * accessing the below registers will fault. |
329 | */ | 348 | */ |
330 | if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) { | 349 | if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) { |
350 | /* Make sure that I&D is not locked down when starting */ | ||
351 | l2x0_unlock(cache_id); | ||
331 | 352 | ||
332 | /* l2x0 controller is disabled */ | 353 | /* l2x0 controller is disabled */ |
333 | writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL); | 354 | writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL); |
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 64ab41348f30..34409a08ba0d 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
@@ -298,7 +298,7 @@ static void __init arm_bootmem_free(unsigned long min, unsigned long max_low, | |||
298 | #ifdef CONFIG_HAVE_ARCH_PFN_VALID | 298 | #ifdef CONFIG_HAVE_ARCH_PFN_VALID |
299 | int pfn_valid(unsigned long pfn) | 299 | int pfn_valid(unsigned long pfn) |
300 | { | 300 | { |
301 | return memblock_is_memory(pfn << PAGE_SHIFT); | 301 | return memblock_is_memory(__pfn_to_phys(pfn)); |
302 | } | 302 | } |
303 | EXPORT_SYMBOL(pfn_valid); | 303 | EXPORT_SYMBOL(pfn_valid); |
304 | #endif | 304 | #endif |