[ARM] Unuse another Linux PTE bit

L_PTE_ASID is not really required to be stored in every PTE, since we
can identify it via the address passed to set_pte_at().  So, create
set_pte_ext() which takes the address of the PTE to set, the Linux
PTE value, and the additional CPU PTE bits which aren't encoded in
the Linux PTE value.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

25 files changed, 71 insertions, 75 deletions

diff --git a/arch/arm/mm/consistent.c b/arch/arm/mm/consistent.c
index b797217e82be..6a9c362fef5e 100644
--- a/arch/arm/mm/consistent.c
+++ b/arch/arm/mm/consistent.c
@@ -238,7 +238,7 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
                          * x86 does not mark the pages reserved...
                          */
                         SetPageReserved(page);
-                        set_pte(pte, mk_pte(page, prot));
+                        set_pte_ext(pte, mk_pte(page, prot), 0);
                         page++;
                         pte++;
                         off++;
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c
index df1645e14b4c..408b05ae6b9b 100644
--- a/arch/arm/mm/copypage-v4mc.c
+++ b/arch/arm/mm/copypage-v4mc.c
@@ -71,7 +71,7 @@ void v4_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
 {
         spin_lock(&minicache_lock);
 
-        set_pte(TOP_PTE(0xffff8000), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot));
+        set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0);
         flush_tlb_kernel_page(0xffff8000);
 
         mc_copy_user_page((void *)0xffff8000, kto);
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index 3d0d3a963d20..865777dec161 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -70,8 +70,8 @@ static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned lo
          */
         spin_lock(&v6_lock);
 
-        set_pte(TOP_PTE(from_address) + offset, pfn_pte(__pa(kfrom) >> PAGE_SHIFT, PAGE_KERNEL));
-        set_pte(TOP_PTE(to_address) + offset, pfn_pte(__pa(kto) >> PAGE_SHIFT, PAGE_KERNEL));
+        set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(__pa(kfrom) >> PAGE_SHIFT, PAGE_KERNEL), 0);
+        set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(__pa(kto) >> PAGE_SHIFT, PAGE_KERNEL), 0);
 
         from = from_address + (offset << PAGE_SHIFT);
         to   = to_address + (offset << PAGE_SHIFT);
@@ -110,7 +110,7 @@ static void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr)
          */
         spin_lock(&v6_lock);
 
-        set_pte(TOP_PTE(to_address) + offset, pfn_pte(__pa(kaddr) >> PAGE_SHIFT, PAGE_KERNEL));
+        set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(__pa(kaddr) >> PAGE_SHIFT, PAGE_KERNEL), 0);
         flush_tlb_kernel_page(to);
         clear_page((void *)to);
 
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c
index 84ebe0aa379e..aea5da723596 100644
--- a/arch/arm/mm/copypage-xscale.c
+++ b/arch/arm/mm/copypage-xscale.c
@@ -93,7 +93,7 @@ void xscale_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
 {
         spin_lock(&minicache_lock);
 
-        set_pte(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot));
+        set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0);
         flush_tlb_kernel_page(COPYPAGE_MINICACHE);
 
         mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c
index 7fc1b35a6746..cf95c5d0ce4c 100644
--- a/arch/arm/mm/fault-armv.c
+++ b/arch/arm/mm/fault-armv.c
@@ -61,7 +61,7 @@ static int adjust_pte(struct vm_area_struct *vma, unsigned long address)
         if (pte_present(entry) && pte_val(entry) & shared_pte_mask) {
                 flush_cache_page(vma, address, pte_pfn(entry));
                 pte_val(entry) &= ~shared_pte_mask;
-                set_pte(pte, entry);
+                set_pte_at(vma->vm_mm, address, pte, entry);
                 flush_tlb_page(vma, address);
                 ret = 1;
         }
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 454205b789d5..628348c9f6c5 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -26,7 +26,7 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
         unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
         const int zero = 0;
 
-        set_pte(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL));
+        set_pte_ext(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL), 0);
         flush_tlb_kernel_page(to);
 
         asm(    "mcrr   p15, 0, %1, %0, c14\n"
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 465440592791..a43d2800a9cd 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -40,7 +40,7 @@
 
 static inline void
 remap_area_pte(pte_t * pte, unsigned long address, unsigned long size,
-               unsigned long phys_addr, pgprot_t pgprot)
+               unsigned long phys_addr, pgprot_t prot)
 {
         unsigned long end;
 
@@ -53,7 +53,7 @@ remap_area_pte(pte_t * pte, unsigned long address, unsigned long size,
                 if (!pte_none(*pte))
                         goto bad;
 
-                set_pte(pte, pfn_pte(phys_addr >> PAGE_SHIFT, pgprot));
+                set_pte_ext(pte, pfn_pte(phys_addr >> PAGE_SHIFT, prot), 0);
                 address += PAGE_SIZE;
                 phys_addr += PAGE_SIZE;
                 pte++;
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index b7f194af20b4..f028aef9a861 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -294,12 +294,6 @@ static void __init build_mem_type_table(void)
                 mem_types[MT_DEVICE].prot_pte |= L_PTE_BUFFERABLE;
                 mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED;
 
-                /*
-                 * User pages need to be mapped with the ASID
-                 * (iow, non-global)
-                 */
-                user_pgprot |= L_PTE_ASID;
-
 #ifdef CONFIG_SMP
                 /*
                  * Mark memory with the "shared" attribute for SMP systems
@@ -408,7 +402,7 @@ alloc_init_page(unsigned long virt, unsigned long phys, unsigned int prot_l1, pg
         }
         ptep = pte_offset_kernel(pmdp, virt);
 
-        set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
+        set_pte_ext(ptep, pfn_pte(phys >> PAGE_SHIFT, prot), 0);
 }
 
 /*
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index 20c1b0df75f2..50b9aed6000d 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -57,7 +57,7 @@ pgd_t *get_pgd_slow(struct mm_struct *mm)
 
                 init_pmd = pmd_offset(init_pgd, 0);
                 init_pte = pte_offset_map_nested(init_pmd, 0);
-                set_pte(new_pte, *init_pte);
+                set_pte_ext(new_pte, *init_pte, 0);
                 pte_unmap_nested(init_pte);
                 pte_unmap(new_pte);
         }
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index 289b8e6f504d..700c04d6996e 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -397,7 +397,7 @@ ENTRY(cpu_arm1020_switch_mm)
  * Set a PTE and flush it out
  */
         .align  5
-ENTRY(cpu_arm1020_set_pte)
+ENTRY(cpu_arm1020_set_pte_ext)
 #ifdef CONFIG_MMU
         str     r1, [r0], #-2048                @ linux version
 
@@ -477,7 +477,7 @@ arm1020_processor_functions:
         .word   cpu_arm1020_do_idle
         .word   cpu_arm1020_dcache_clean_area
         .word   cpu_arm1020_switch_mm
-        .word   cpu_arm1020_set_pte
+        .word   cpu_arm1020_set_pte_ext
         .size   arm1020_processor_functions, . - arm1020_processor_functions
 
         .section ".rodata"
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index bed9db6ba582..1cc206ab5eae 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -381,7 +381,7 @@ ENTRY(cpu_arm1020e_switch_mm)
  * Set a PTE and flush it out
  */
         .align  5
-ENTRY(cpu_arm1020e_set_pte)
+ENTRY(cpu_arm1020e_set_pte_ext)
 #ifdef CONFIG_MMU
         str     r1, [r0], #-2048                @ linux version
 
@@ -458,7 +458,7 @@ arm1020e_processor_functions:
         .word   cpu_arm1020e_do_idle
         .word   cpu_arm1020e_dcache_clean_area
         .word   cpu_arm1020e_switch_mm
-        .word   cpu_arm1020e_set_pte
+        .word   cpu_arm1020e_set_pte_ext
         .size   arm1020e_processor_functions, . - arm1020e_processor_functions
 
         .section ".rodata"
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index d2a7c1b9cab9..aff0ea08e2f8 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -358,12 +358,12 @@ ENTRY(cpu_arm1022_switch_mm)
         mov     pc, lr
         
 /*
- * cpu_arm1022_set_pte(ptep, pte)
+ * cpu_arm1022_set_pte_ext(ptep, pte, ext)
  *
  * Set a PTE and flush it out
  */
         .align  5
-ENTRY(cpu_arm1022_set_pte)
+ENTRY(cpu_arm1022_set_pte_ext)
 #ifdef CONFIG_MMU
         str     r1, [r0], #-2048                @ linux version
 
@@ -441,7 +441,7 @@ arm1022_processor_functions:
         .word   cpu_arm1022_do_idle
         .word   cpu_arm1022_dcache_clean_area
         .word   cpu_arm1022_switch_mm
-        .word   cpu_arm1022_set_pte
+        .word   cpu_arm1022_set_pte_ext
         .size   arm1022_processor_functions, . - arm1022_processor_functions
 
         .section ".rodata"
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 3247ce5c0177..65e43a109085 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -347,12 +347,12 @@ ENTRY(cpu_arm1026_switch_mm)
         mov     pc, lr
         
 /*
- * cpu_arm1026_set_pte(ptep, pte)
+ * cpu_arm1026_set_pte_ext(ptep, pte, ext)
  *
  * Set a PTE and flush it out
  */
         .align  5
-ENTRY(cpu_arm1026_set_pte)
+ENTRY(cpu_arm1026_set_pte_ext)
 #ifdef CONFIG_MMU
         str     r1, [r0], #-2048                @ linux version
 
@@ -436,7 +436,7 @@ arm1026_processor_functions:
         .word   cpu_arm1026_do_idle
         .word   cpu_arm1026_dcache_clean_area
         .word   cpu_arm1026_switch_mm
-        .word   cpu_arm1026_set_pte
+        .word   cpu_arm1026_set_pte_ext
         .size   arm1026_processor_functions, . - arm1026_processor_functions
 
         .section .rodata
diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S
index ce4f9eef763c..123a7dc7a433 100644
--- a/arch/arm/mm/proc-arm6_7.S
+++ b/arch/arm/mm/proc-arm6_7.S
@@ -209,14 +209,14 @@ ENTRY(cpu_arm7_switch_mm)
                 mov     pc, lr
 
 /*
- * Function: arm6_7_set_pte(pte_t *ptep, pte_t pte)
+ * Function: arm6_7_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext)
  * Params  : r0 = Address to set
  *         : r1 = value to set
  * Purpose : Set a PTE and flush it out of any WB cache
  */
                 .align  5
-ENTRY(cpu_arm6_set_pte)
-ENTRY(cpu_arm7_set_pte)
+ENTRY(cpu_arm6_set_pte_ext)
+ENTRY(cpu_arm7_set_pte_ext)
 #ifdef CONFIG_MMU
                 str     r1, [r0], #-2048                @ linux version
 
@@ -299,7 +299,7 @@ ENTRY(arm6_processor_functions)
                 .word   cpu_arm6_do_idle
                 .word   cpu_arm6_dcache_clean_area
                 .word   cpu_arm6_switch_mm
-                .word   cpu_arm6_set_pte
+                .word   cpu_arm6_set_pte_ext
                 .size   arm6_processor_functions, . - arm6_processor_functions
 
 /*
@@ -315,7 +315,7 @@ ENTRY(arm7_processor_functions)
                 .word   cpu_arm7_do_idle
                 .word   cpu_arm7_dcache_clean_area
                 .word   cpu_arm7_switch_mm
-                .word   cpu_arm7_set_pte
+                .word   cpu_arm7_set_pte_ext
                 .size   arm7_processor_functions, . - arm7_processor_functions
 
                 .section ".rodata"
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S
index c04c194da785..dc763be43362 100644
--- a/arch/arm/mm/proc-arm720.S
+++ b/arch/arm/mm/proc-arm720.S
@@ -88,13 +88,13 @@ ENTRY(cpu_arm720_switch_mm)
                 mov     pc, lr
 
 /*
- * Function: arm720_set_pte(pte_t *ptep, pte_t pte)
+ * Function: arm720_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext)
  * Params  : r0 = Address to set
  *         : r1 = value to set
  * Purpose : Set a PTE and flush it out of any WB cache
  */
                 .align  5
-ENTRY(cpu_arm720_set_pte)
+ENTRY(cpu_arm720_set_pte_ext)
 #ifdef CONFIG_MMU
                 str     r1, [r0], #-2048                @ linux version
 
@@ -204,7 +204,7 @@ ENTRY(arm720_processor_functions)
                 .word   cpu_arm720_do_idle
                 .word   cpu_arm720_dcache_clean_area
                 .word   cpu_arm720_switch_mm
-                .word   cpu_arm720_set_pte
+                .word   cpu_arm720_set_pte_ext
                 .size   arm720_processor_functions, . - arm720_processor_functions
 
                 .section ".rodata"
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 65cbb2851bff..75c945ed6c4d 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -344,12 +344,12 @@ ENTRY(cpu_arm920_switch_mm)
         mov     pc, lr
 
 /*
- * cpu_arm920_set_pte(ptep, pte)
+ * cpu_arm920_set_pte(ptep, pte, ext)
  *
  * Set a PTE and flush it out
  */
         .align  5
-ENTRY(cpu_arm920_set_pte)
+ENTRY(cpu_arm920_set_pte_ext)
 #ifdef CONFIG_MMU
         str     r1, [r0], #-2048                @ linux version
 
@@ -423,7 +423,7 @@ arm920_processor_functions:
         .word   cpu_arm920_do_idle
         .word   cpu_arm920_dcache_clean_area
         .word   cpu_arm920_switch_mm
-        .word   cpu_arm920_set_pte
+        .word   cpu_arm920_set_pte_ext
         .size   arm920_processor_functions, . - arm920_processor_functions
 
         .section ".rodata"
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 52761b70d735..ffb751b877ff 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -348,12 +348,12 @@ ENTRY(cpu_arm922_switch_mm)
         mov     pc, lr
 
 /*
- * cpu_arm922_set_pte(ptep, pte)
+ * cpu_arm922_set_pte_ext(ptep, pte, ext)
  *
  * Set a PTE and flush it out
  */
         .align  5
-ENTRY(cpu_arm922_set_pte)
+ENTRY(cpu_arm922_set_pte_ext)
 #ifdef CONFIG_MMU
         str     r1, [r0], #-2048                @ linux version
 
@@ -427,7 +427,7 @@ arm922_processor_functions:
         .word   cpu_arm922_do_idle
         .word   cpu_arm922_dcache_clean_area
         .word   cpu_arm922_switch_mm
-        .word   cpu_arm922_set_pte
+        .word   cpu_arm922_set_pte_ext
         .size   arm922_processor_functions, . - arm922_processor_functions
 
         .section ".rodata"
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 5b74339d1588..44c2c997819f 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -391,12 +391,12 @@ ENTRY(cpu_arm925_switch_mm)
         mov     pc, lr
 
 /*
- * cpu_arm925_set_pte(ptep, pte)
+ * cpu_arm925_set_pte_ext(ptep, pte, ext)
  *
  * Set a PTE and flush it out
  */
         .align  5
-ENTRY(cpu_arm925_set_pte)
+ENTRY(cpu_arm925_set_pte_ext)
 #ifdef CONFIG_MMU
         str     r1, [r0], #-2048                @ linux version
 
@@ -490,7 +490,7 @@ arm925_processor_functions:
         .word   cpu_arm925_do_idle
         .word   cpu_arm925_dcache_clean_area
         .word   cpu_arm925_switch_mm
-        .word   cpu_arm925_set_pte
+        .word   cpu_arm925_set_pte_ext
         .size   arm925_processor_functions, . - arm925_processor_functions
 
         .section ".rodata"
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 080efac9d9ff..5b80b6bdd0cb 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -348,12 +348,12 @@ ENTRY(cpu_arm926_switch_mm)
         mov     pc, lr
 
 /*
- * cpu_arm926_set_pte(ptep, pte)
+ * cpu_arm926_set_pte_ext(ptep, pte, ext)
  *
  * Set a PTE and flush it out
  */
         .align  5
-ENTRY(cpu_arm926_set_pte)
+ENTRY(cpu_arm926_set_pte_ext)
 #ifdef CONFIG_MMU
         str     r1, [r0], #-2048                @ linux version
 
@@ -439,7 +439,7 @@ arm926_processor_functions:
         .word   cpu_arm926_do_idle
         .word   cpu_arm926_dcache_clean_area
         .word   cpu_arm926_switch_mm
-        .word   cpu_arm926_set_pte
+        .word   cpu_arm926_set_pte_ext
         .size   arm926_processor_functions, . - arm926_processor_functions
 
         .section ".rodata"
diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S
index cd7d865c9d19..6e226e12989f 100644
--- a/arch/arm/mm/proc-sa110.S
+++ b/arch/arm/mm/proc-sa110.S
@@ -146,12 +146,12 @@ ENTRY(cpu_sa110_switch_mm)
 #endif
 
 /*
- * cpu_sa110_set_pte(ptep, pte)
+ * cpu_sa110_set_pte_ext(ptep, pte, ext)
  *
  * Set a PTE and flush it out
  */
         .align  5
-ENTRY(cpu_sa110_set_pte)
+ENTRY(cpu_sa110_set_pte_ext)
 #ifdef CONFIG_MMU
         str     r1, [r0], #-2048                @ linux version
 
@@ -222,7 +222,7 @@ ENTRY(sa110_processor_functions)
         .word   cpu_sa110_do_idle
         .word   cpu_sa110_dcache_clean_area
         .word   cpu_sa110_switch_mm
-        .word   cpu_sa110_set_pte
+        .word   cpu_sa110_set_pte_ext
         .size   sa110_processor_functions, . - sa110_processor_functions
 
         .section ".rodata"
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index b776653cc31c..9afb11d089fe 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -159,12 +159,12 @@ ENTRY(cpu_sa1100_switch_mm)
 #endif
 
 /*
- * cpu_sa1100_set_pte(ptep, pte)
+ * cpu_sa1100_set_pte_ext(ptep, pte, ext)
  *
  * Set a PTE and flush it out
  */
         .align  5
-ENTRY(cpu_sa1100_set_pte)
+ENTRY(cpu_sa1100_set_pte_ext)
 #ifdef CONFIG_MMU
         str     r1, [r0], #-2048                @ linux version
 
@@ -237,7 +237,7 @@ ENTRY(sa1100_processor_functions)
         .word   cpu_sa1100_do_idle
         .word   cpu_sa1100_dcache_clean_area
         .word   cpu_sa1100_switch_mm
-        .word   cpu_sa1100_set_pte
+        .word   cpu_sa1100_set_pte_ext
         .size   sa1100_processor_functions, . - sa1100_processor_functions
 
         .section ".rodata"
diff --git a/arch/arm/mm/proc-syms.c b/arch/arm/mm/proc-syms.c
index ab143557e688..9f396b4fa0b7 100644
--- a/arch/arm/mm/proc-syms.c
+++ b/arch/arm/mm/proc-syms.c
@@ -17,7 +17,7 @@
 
 #ifndef MULTI_CPU
 EXPORT_SYMBOL(cpu_dcache_clean_area);
-EXPORT_SYMBOL(cpu_set_pte);
+EXPORT_SYMBOL(cpu_set_pte_ext);
 #else
 EXPORT_SYMBOL(processor);
 #endif
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 513c6c28256d..7b1843befb9c 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -103,13 +103,14 @@ ENTRY(cpu_v6_switch_mm)
         mov     pc, lr
 
 /*
- *      cpu_v6_set_pte(ptep, pte)
+ *      cpu_v6_set_pte_ext(ptep, pte, ext)
  *
  *      Set a level 2 translation table entry.
  *
  *      - ptep  - pointer to level 2 translation table entry
  *                (hardware version is stored at -1024 bytes)
  *      - pte   - PTE value to store
+ *      - ext   - value for extended PTE bits
  *
  *      Permissions:
  *        YUWD  APX AP1 AP0     SVC     User
@@ -121,33 +122,34 @@ ENTRY(cpu_v6_switch_mm)
  *        11x0   0   1   0      r/w     r/o
  *        1111   0   1   1      r/w     r/w
  */
-ENTRY(cpu_v6_set_pte)
+ENTRY(cpu_v6_set_pte_ext)
 #ifdef CONFIG_MMU
         str     r1, [r0], #-2048                @ linux version
 
-        bic     r2, r1, #0x000003f0
-        bic     r2, r2, #0x00000003
-        orr     r2, r2, #PTE_EXT_AP0 | 2
+        bic     r3, r1, #0x000003f0
+        bic     r3, r3, #0x00000003
+        orr     r3, r3, r2
+        orr     r3, r3, #PTE_EXT_AP0 | 2
 
         tst     r1, #L_PTE_WRITE
         tstne   r1, #L_PTE_DIRTY
-        orreq   r2, r2, #PTE_EXT_APX
+        orreq   r3, r3, #PTE_EXT_APX
 
         tst     r1, #L_PTE_USER
-        orrne   r2, r2, #PTE_EXT_AP1
-        tstne   r2, #PTE_EXT_APX
-        bicne   r2, r2, #PTE_EXT_APX | PTE_EXT_AP0
+        orrne   r3, r3, #PTE_EXT_AP1
+        tstne   r3, #PTE_EXT_APX
+        bicne   r3, r3, #PTE_EXT_APX | PTE_EXT_AP0
 
         tst     r1, #L_PTE_YOUNG
-        biceq   r2, r2, #PTE_EXT_APX | PTE_EXT_AP_MASK
+        biceq   r3, r3, #PTE_EXT_APX | PTE_EXT_AP_MASK
 
         tst     r1, #L_PTE_EXEC
-        orreq   r2, r2, #PTE_EXT_XN
+        orreq   r3, r3, #PTE_EXT_XN
 
         tst     r1, #L_PTE_PRESENT
-        moveq   r2, #0
+        moveq   r3, #0
 
-        str     r2, [r0]
+        str     r3, [r0]
         mcr     p15, 0, r0, c7, c10, 1 @ flush_pte
 #endif
         mov     pc, lr
@@ -233,7 +235,7 @@ ENTRY(v6_processor_functions)
         .word   cpu_v6_do_idle
         .word   cpu_v6_dcache_clean_area
         .word   cpu_v6_switch_mm
-        .word   cpu_v6_set_pte
+        .word   cpu_v6_set_pte_ext
         .size   v6_processor_functions, . - v6_processor_functions
 
         .type   cpu_arch_name, #object
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index 1ef564d0957f..43494ae8f01a 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -357,13 +357,13 @@ ENTRY(cpu_xsc3_switch_mm)
         cpwait_ret lr, ip
 
 /*
- * cpu_xsc3_set_pte(ptep, pte)
+ * cpu_xsc3_set_pte_ext(ptep, pte, ext)
  *
  * Set a PTE and flush it out
  *
  */
         .align  5
-ENTRY(cpu_xsc3_set_pte)
+ENTRY(cpu_xsc3_set_pte_ext)
         str     r1, [r0], #-2048                @ linux version
 
         bic     r2, r1, #0xff0                  @ Keep C, B bits
@@ -457,7 +457,7 @@ ENTRY(xsc3_processor_functions)
         .word   cpu_xsc3_do_idle
         .word   cpu_xsc3_dcache_clean_area
         .word   cpu_xsc3_switch_mm
-        .word   cpu_xsc3_set_pte
+        .word   cpu_xsc3_set_pte_ext
         .size   xsc3_processor_functions, . - xsc3_processor_functions
 
         .section ".rodata"
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index cc1004b3e511..490e11b34231 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -421,14 +421,14 @@ ENTRY(cpu_xscale_switch_mm)
         cpwait_ret lr, ip
 
 /*
- * cpu_xscale_set_pte(ptep, pte)
+ * cpu_xscale_set_pte_ext(ptep, pte, ext)
  *
  * Set a PTE and flush it out
  *
  * Errata 40: must set memory to write-through for user read-only pages.
  */
         .align  5
-ENTRY(cpu_xscale_set_pte)
+ENTRY(cpu_xscale_set_pte_ext)
         str     r1, [r0], #-2048                @ linux version
 
         bic     r2, r1, #0xff0
@@ -529,7 +529,7 @@ ENTRY(xscale_processor_functions)
         .word   cpu_xscale_do_idle
         .word   cpu_xscale_dcache_clean_area
         .word   cpu_xscale_switch_mm
-        .word   cpu_xscale_set_pte
+        .word   cpu_xscale_set_pte_ext
         .size   xscale_processor_functions, . - xscale_processor_functions
 
         .section ".rodata"